From 242ea84b017b7f2812a4a1ba4b4996e5f1bb35ab Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Thu, 23 Nov 2017 21:23:44 +0100 Subject: intel: Replace msr(0x198) with msr(IA32_PERF_STATUS) Change-Id: I22241427d1405de2e2eb2b3cfb029f3ce2c8dace Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/22585 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/include/cpu/intel/speedstep.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/include/cpu/intel') diff --git a/src/include/cpu/intel/speedstep.h b/src/include/cpu/intel/speedstep.h index 40234d5fca..59336ed0c6 100644 --- a/src/include/cpu/intel/speedstep.h +++ b/src/include/cpu/intel/speedstep.h @@ -36,7 +36,7 @@ /* Speedstep related MSRs */ #define IA32_PLATFORM_ID 0x017 -#define IA32_PERF_STS 0x198 +#define IA32_PERF_STATUS 0x198 #define IA32_PERF_CTL 0x199 #define MSR_THERM2_CTL 0x19D #define IA32_MISC_ENABLES 0x1A0 -- cgit v1.2.3