From 062b92ef654a97648380a1a9a9fe34229ee76e31 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Tue, 20 Oct 2020 14:27:09 +0200 Subject: cpu/intel/common: rework code previously moved to common cpu code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Rework the code moved to common code in CB:46274. This involves simplification by using appropriate helpers for MSR and CPUID, using macros instead of plain values for MSRs and cpu features and adding documentation to the header. Change-Id: I7615fc26625c44931577216ea42f0a733b99e131 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/46588 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/include/cpu/intel/msr.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/include/cpu/intel') diff --git a/src/include/cpu/intel/msr.h b/src/include/cpu/intel/msr.h index 9dbea776dd..a2165f365a 100644 --- a/src/include/cpu/intel/msr.h +++ b/src/include/cpu/intel/msr.h @@ -10,5 +10,6 @@ #define AESNI_LOCK (1 << 0) #define MSR_PIC_MSG_CONTROL 0x2e +#define TPR_UPDATES_DISABLE (1 << 10) #endif /* CPU_INTEL_MSR_H */ -- cgit v1.2.3