From d840eb5719e51e1946ab322c0eb94defc72dde1d Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Thu, 24 May 2018 00:34:15 +0300 Subject: Remove AMD K8 cpu and northbridge support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I9c53dfa93bf906334f5c80e4525a1c27153656a3 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/26673 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/include/cpu/amd/amdk8_sysconf.h | 30 --------- src/include/cpu/amd/model_fxx_rev.h | 131 ------------------------------------ 2 files changed, 161 deletions(-) delete mode 100644 src/include/cpu/amd/amdk8_sysconf.h delete mode 100644 src/include/cpu/amd/model_fxx_rev.h (limited to 'src/include/cpu/amd') diff --git a/src/include/cpu/amd/amdk8_sysconf.h b/src/include/cpu/amd/amdk8_sysconf.h deleted file mode 100644 index 665f9f96b9..0000000000 --- a/src/include/cpu/amd/amdk8_sysconf.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef AMDK8_SYSCONF_H -#define AMDK8_SYSCONF_H - -#define HC_POSSIBLE_NUM 8 - -struct amdk8_sysconf_t { - //ht - unsigned int nodes; - unsigned int hc_possible_num; - unsigned int pci1234[HC_POSSIBLE_NUM]; - unsigned int hcdn[HC_POSSIBLE_NUM]; - unsigned int hcid[HC_POSSIBLE_NUM]; //record ht chain type - unsigned int sbdn; - unsigned int sblk; - - unsigned int hcdn_reg[4]; // it will be used by get_sblk_pci1234 - - int enabled_apic_ext_id; - unsigned int lift_bsp_apicid; - int apicid_offset; - - void *mb; // pointer for mb related struct - -}; - -extern struct amdk8_sysconf_t sysconf; - -void get_sblk_pci1234(void); -void get_bus_conf(void); -#endif diff --git a/src/include/cpu/amd/model_fxx_rev.h b/src/include/cpu/amd/model_fxx_rev.h deleted file mode 100644 index 6fb6194137..0000000000 --- a/src/include/cpu/amd/model_fxx_rev.h +++ /dev/null @@ -1,131 +0,0 @@ -#ifndef __CPU_AMD_MODEL_FXX_REV_H__ -#define __CPU_AMD_MODEL_FXX_REV_H__ - -#include -#include - -int init_processor_name(void); - -static inline int is_cpu_rev_a0(void) -{ - return (cpuid_eax(1) & 0xfffef) == 0x0f00; -} -static inline int is_cpu_pre_c0(void) -{ - return (cpuid_eax(1) & 0xfffef) < 0x0f48; -} - -static inline int is_cpu_c0(void) -{ - return (cpuid_eax(1) & 0xfffef) == 0x0f48; -} - -static inline int is_cpu_pre_b3(void) -{ - return (cpuid_eax(1) & 0xfffef) < 0x0f41; -} - -static inline int is_cpu_b3(void) -{ - return (cpuid_eax(1) & 0xfffef) == 0x0f41; -} -//AMD_D0_SUPPORT -static inline int is_cpu_pre_d0(void) -{ - return (cpuid_eax(1) & 0xfff0f) < 0x10f00; -} - -static inline int is_cpu_d0(void) -{ - return (cpuid_eax(1) & 0xfff0f) == 0x10f00; -} - -//AMD_E0_SUPPORT -static inline int is_cpu_pre_e0(void) -{ - return (cpuid_eax(1) & 0xfff0f) < 0x20f00; -} - -static inline int is_cpu_e0(void) -{ - return (cpuid_eax(1) & 0xfff00) == 0x20f00; -} - -//AMD_F0_SUPPORT -static inline int is_cpu_pre_f0(void) -{ - return (cpuid_eax(1) & 0xfff0f) < 0x40f00; -} - -static inline int is_cpu_f0(void) -{ - return (cpuid_eax(1) & 0xfff00) == 0x40f00; -} - -static inline int is_cpu_pre_f2(void) -{ - return (cpuid_eax(1) & 0xfff0f) < 0x40f02; -} - -#ifdef __PRE_RAM__ -static inline int is_e0_later_in_bsp(int nodeid) -{ - uint32_t val; - uint32_t val_old; - int e0_later; - - if (IS_ENABLED(CONFIG_K8_REV_F_SUPPORT)) - return 1; - - // we don't need to do that for node 0 in core0/node0 - if (nodeid == 0) - return !is_cpu_pre_e0(); - - // d0 will be treated as e0 with this methods, but the d0 nb_cfg_54 - // always 0 - pci_devfn_t dev; - dev = PCI_DEV(0, 0x18+nodeid, 2); - val_old = pci_read_config32(dev, 0x80); - val = val_old; - val |= (1<<3); - pci_write_config32(dev, 0x80, val); - val = pci_read_config32(dev, 0x80); - e0_later = !!(val & (1<<3)); - - // pre_e0 bit 3 always be 0 and can not be changed - if (e0_later) - pci_write_config32(dev, 0x80, val_old); // restore it - - return e0_later; -} - -static inline int is_cpu_f0_in_bsp(int nodeid) -{ - uint32_t dword; - pci_devfn_t dev; - if (!IS_ENABLED(CONFIG_K8_REV_F_SUPPORT)) - return 0; - dev = PCI_DEV(0, 0x18+nodeid, 3); - dword = pci_read_config32(dev, 0xfc); - return (dword & 0xfff00) == 0x40f00; -} - -static inline int is_cpu_pre_f2_in_bsp(int nodeid) -{ - uint32_t dword; - pci_devfn_t dev; - - if (!IS_ENABLED(CONFIG_K8_REV_F_SUPPORT)) - return 1; - dev = PCI_DEV(0, 0x18+nodeid, 3); - dword = pci_read_config32(dev, 0xfc); - return (dword & 0xfff0f) < 0x40f02; -} - -#else - -int is_e0_later_in_bsp(int nodeid); -int is_cpu_f0_in_bsp(int nodeid); - -#endif -#endif /* __CPU_AMD_MODEL_FXX_REV_H__ */ -- cgit v1.2.3