From 45f6c5e3d450053e53a8ff4a687fd0dcaf2d7475 Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Mon, 10 Apr 2006 16:40:19 +0000 Subject: add cpureginit to romcc code. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2249 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/include/cpu/amd/gx2def.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/include/cpu/amd') diff --git a/src/include/cpu/amd/gx2def.h b/src/include/cpu/amd/gx2def.h index 9bb4f571f0..5ca14dd92d 100644 --- a/src/include/cpu/amd/gx2def.h +++ b/src/include/cpu/amd/gx2def.h @@ -69,11 +69,11 @@ #define GL0_DF 6 #define GL1_GLIU0 1 -#define GL1_GLCP 3 +#define GL1_GLCP 3 #define GL1_PCI 4 #define GL1_FG 5 -#define GL1_VIP 5 -#define GL1_AES 6 +#define GL1_VIP 5 +#define GL1_AES 6 #define MSR_GLIU0 (GL0_GLIU0 << 29) + (1 << 28) /* To get on GeodeLink one bit has to be set */ #define MSR_MC (GL0_MC << 29) -- cgit v1.2.3