From 54b8e7a0bba7787eca737506cb5d85bf408344d2 Mon Sep 17 00:00:00 2001 From: Marc Jones Date: Tue, 29 Oct 2013 17:57:30 -0600 Subject: Add Intel FSP northbridge support Sandybridge and Ivybridge MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for Sandybridge and Ivybridge using the Intel FSP. The FSP is different enough to warrant its own source files. This source handle the majority of FSP interaction. "Intel® Firmware Support Package (Intel® FSP) provides key programming information for initializing Intel® silicon and can be easily integrated into a boot loader of the developer’s choice. It is easy to adopt, scalable to design, reduces time-to-market, and is economical to build." http://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-support-package/intel-fsp-overview.html Change-Id: Ib879c6b0fbf2eb1cbf929a87f592df29ac48bcc5 Signed-off-by: Marc Jones Reviewed-on: http://review.coreboot.org/4015 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich Reviewed-by: Stefan Reinauer --- src/include/cbmem.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/include/cbmem.h') diff --git a/src/include/cbmem.h b/src/include/cbmem.h index b3d3fff281..0c32111ebc 100644 --- a/src/include/cbmem.h +++ b/src/include/cbmem.h @@ -73,6 +73,7 @@ #define CBMEM_ID_EHCI_DEBUG 0xe4c1deb9 #define CBMEM_ID_NONE 0x00000000 #define CBMEM_ID_AGESA_RUNTIME 0x41474553 +#define CBMEM_ID_HOB_POINTER 0x484f4221 #ifndef __ASSEMBLER__ #include -- cgit v1.2.3