From bd74a4b2d25268f7035a4478da31f27baac2aecc Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Fri, 6 Mar 2015 23:17:33 -0600 Subject: coreboot: common stage cache Many chipsets were using a stage cache for reference code or when using a relocatable ramstage. Provide a common API for the chipsets to use while reducing code duplication. Change-Id: Ia36efa169fe6bd8a3dbe07bf57a9729c7edbdd46 Signed-off-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/8625 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones --- src/include/cbfs.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/include/cbfs.h') diff --git a/src/include/cbfs.h b/src/include/cbfs.h index 086fa19eb6..05ce2f7f31 100644 --- a/src/include/cbfs.h +++ b/src/include/cbfs.h @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2008 Jordan Crouse - * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. + * Copyright (C) 2013-2015 Google, Inc. * * This file is dual-licensed. You can choose between: * - The GNU GPL, version 2, as published by the Free Software Foundation @@ -90,4 +90,3 @@ void cbfs_set_header_offset(size_t offset); static inline void cbfs_set_header_offset(size_t offset) {} #endif #endif - -- cgit v1.2.3