From 26cf00ab498a78b59c9170d38d6ee7ced930259c Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Sun, 14 Oct 2018 02:39:46 +0000 Subject: ec/google/common: Add a common MEC interface In order to re-use the MEC interface code in the Chrome EC driver move it to a common directory within the ec/google directory. The Chrome EC driver itself is changed to use this interface in the next commit, and future commits will introduce a new EC that also uses this interface. Change-Id: I13516b5e4c4c49f53bb998366284a26703142e2a Signed-off-by: Duncan Laurie Reviewed-on: https://review.coreboot.org/29111 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Aaron Durbin --- src/ec/google/common/Kconfig | 4 ++ src/ec/google/common/Makefile.inc | 5 ++ src/ec/google/common/mec.c | 122 ++++++++++++++++++++++++++++++++++++++ src/ec/google/common/mec.h | 43 ++++++++++++++ 4 files changed, 174 insertions(+) create mode 100644 src/ec/google/common/Kconfig create mode 100644 src/ec/google/common/Makefile.inc create mode 100644 src/ec/google/common/mec.c create mode 100644 src/ec/google/common/mec.h (limited to 'src/ec/google') diff --git a/src/ec/google/common/Kconfig b/src/ec/google/common/Kconfig new file mode 100644 index 0000000000..2e138a555f --- /dev/null +++ b/src/ec/google/common/Kconfig @@ -0,0 +1,4 @@ +config EC_GOOGLE_COMMON_MEC + bool + help + Google common EC functions for Microchip EMI region. diff --git a/src/ec/google/common/Makefile.inc b/src/ec/google/common/Makefile.inc new file mode 100644 index 0000000000..7ab2285ac6 --- /dev/null +++ b/src/ec/google/common/Makefile.inc @@ -0,0 +1,5 @@ +bootblock-$(CONFIG_EC_GOOGLE_COMMON_MEC) += mec.c +verstage-$(CONFIG_EC_GOOGLE_COMMON_MEC) += mec.c +romstage-$(CONFIG_EC_GOOGLE_COMMON_MEC) += mec.c +ramstage-$(CONFIG_EC_GOOGLE_COMMON_MEC) += mec.c +smm-$(CONFIG_EC_GOOGLE_COMMON_MEC) += mec.c diff --git a/src/ec/google/common/mec.c b/src/ec/google/common/mec.c new file mode 100644 index 0000000000..06a6bca553 --- /dev/null +++ b/src/ec/google/common/mec.c @@ -0,0 +1,122 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include + +#include "mec.h" + +enum mec_access_mode { + /* 8-bit access */ + ACCESS_TYPE_BYTE = 0x0, + /* 16-bit access */ + ACCESS_TYPE_WORD = 0x1, + /* 32-bit access */ + ACCESS_TYPE_LONG = 0x2, + /* + * 32-bit access, read or write of MEC_EMI_EC_DATA_B3 causes the + * EC data register to be incremented. + */ + ACCESS_TYPE_LONG_AUTO_INCREMENT = 0x3, +}; + +/* EMI registers are relative to base */ +#define MEC_EMI_HOST_TO_EC(base) ((base) + 0) +#define MEC_EMI_EC_TO_HOST(base) ((base) + 1) +#define MEC_EMI_EC_ADDRESS_B0(base) ((base) + 2) +#define MEC_EMI_EC_ADDRESS_B1(base) ((base) + 3) +#define MEC_EMI_EC_DATA_B0(base) ((base) + 4) +#define MEC_EMI_EC_DATA_B1(base) ((base) + 5) +#define MEC_EMI_EC_DATA_B2(base) ((base) + 6) +#define MEC_EMI_EC_DATA_B3(base) ((base) + 7) + +/* + * cros_ec_lpc_mec_emi_write_address + * + * Initialize EMI read / write at a given address. + * + * @base: Starting read / write address + * @offset: Offset applied to base address + * @access_mode: Type of access, typically 32-bit auto-increment + */ +static void mec_emi_write_address(uint16_t base, uint16_t offset, + enum mec_access_mode access_mode) +{ + outb((offset & 0xfc) | access_mode, MEC_EMI_EC_ADDRESS_B0(base)); + outb((offset >> 8) & 0x7f, MEC_EMI_EC_ADDRESS_B1(base)); +} + +uint8_t mec_io_bytes(enum mec_io_type type, uint16_t base, + uint16_t offset, void *buffer, size_t size) +{ + enum mec_access_mode access_mode, new_access_mode; + uint8_t *buf = buffer; + uint8_t checksum = 0; + int io_addr; + int i = 0; + + if (size == 0 || base == 0) + return 0; + + /* + * Long access cannot be used on misaligned data since reading B0 loads + * the data register and writing B3 flushes it. + */ + if ((offset & 0x3) || (size < 4)) + access_mode = ACCESS_TYPE_BYTE; + else + access_mode = ACCESS_TYPE_LONG_AUTO_INCREMENT; + + /* Initialize I/O at desired address */ + mec_emi_write_address(base, offset, access_mode); + + /* Skip bytes in case of misaligned offset */ + io_addr = MEC_EMI_EC_DATA_B0(base) + (offset & 0x3); + while (i < size) { + while (io_addr <= MEC_EMI_EC_DATA_B3(base)) { + if (type == MEC_IO_WRITE) + outb(buf[i], io_addr++); + else + buf[i] = inb(io_addr++); + + checksum += buf[i++]; + offset++; + + /* Extra bounds check in case of misaligned size */ + if (i == size) + return checksum; + } + + /* + * Use long auto-increment access except for misaligned write, + * since writing B3 triggers the flush. + */ + if ((size - i) < 4 && type == MEC_IO_WRITE) + new_access_mode = ACCESS_TYPE_BYTE; + else + new_access_mode = ACCESS_TYPE_LONG_AUTO_INCREMENT; + if (new_access_mode != access_mode || + access_mode != ACCESS_TYPE_LONG_AUTO_INCREMENT) { + access_mode = new_access_mode; + mec_emi_write_address(base, offset, access_mode); + } + + /* Access [B0, B3] on each loop pass */ + io_addr = MEC_EMI_EC_DATA_B0(base); + } + + return checksum; +} diff --git a/src/ec/google/common/mec.h b/src/ec/google/common/mec.h new file mode 100644 index 0000000000..3452bada7a --- /dev/null +++ b/src/ec/google/common/mec.h @@ -0,0 +1,43 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef EC_GOOGLE_COMMON_MEC_H +#define EC_GOOGLE_COMMON_MEC_H + +#include +#include + +/* Indicate read or write from MEC IO region */ +enum mec_io_type { + MEC_IO_READ, + MEC_IO_WRITE +}; + +/* + * mec_io_bytes - Read / write bytes to MEC EMI port + * + * @type: Indicate read or write operation + * @base: Base address for MEC EMI region + * @offset: Base read / write address + * @buffer: Destination / source buffer + * @size: Number of bytes to read / write + * + * @returns 8-bit checksum of all bytes read or written + */ + +uint8_t mec_io_bytes(enum mec_io_type type, uint16_t base, + uint16_t offset, void *buffer, size_t size); + +#endif /* EC_GOOGLE_COMMON_MEC_H */ -- cgit v1.2.3