From 0ee7062e305c6ba4457e1edf10de8d5b3b388a70 Mon Sep 17 00:00:00 2001 From: Hung-Te Lin Date: Wed, 26 Jun 2013 19:42:12 +0800 Subject: ec/google: Support ChromeOS EC on SPI bus. For devices with ChromeOS EC on SPI bus, use the standard SPI driver interface (see spi-generic.h) to exchange data. Note: Only EC protocol v3 is supported for SPI bus. Change-Id: Ia8dcdecd125a2bd7424d0c7560e046b6d6988a03 Signed-off-by: Hung-Te Lin Reviewed-on: http://review.coreboot.org/3751 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/ec/google/chromeec/ec_spi.c | 65 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 src/ec/google/chromeec/ec_spi.c (limited to 'src/ec/google/chromeec/ec_spi.c') diff --git a/src/ec/google/chromeec/ec_spi.c b/src/ec/google/chromeec/ec_spi.c new file mode 100644 index 0000000000..5525e31b1f --- /dev/null +++ b/src/ec/google/chromeec/ec_spi.c @@ -0,0 +1,65 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include +#include "ec.h" +#include "ec_commands.h" + +#define CROSEC_SPI_SPEED (500000) + +static int crosec_spi_io(uint8_t *write_bytes, size_t write_size, + uint8_t *read_bytes, size_t read_size, + void *context) +{ + struct spi_slave *slave = (struct spi_slave *)context; + int rv; + + spi_claim_bus(slave); + rv = spi_xfer(slave, write_bytes, write_size * 8, read_bytes, + read_size * 8); + spi_release_bus(slave); + + if (rv != 0) { + printk(BIOS_ERR, "%s: Cannot complete SPI I/O\n", __func__); + return -1; + } + + return 0; +} + +int google_chromeec_command(struct chromeec_command *cec_command) +{ + static struct spi_slave *slave = NULL; + if (!slave) { + slave = spi_setup_slave(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, + CONFIG_EC_GOOGLE_CHROMEEC_SPI_CHIP, + CROSEC_SPI_SPEED, + SPI_READ_FLAG | SPI_WRITE_FLAG); + } + return crosec_command_proto(cec_command, crosec_spi_io, slave); +} + +#ifndef __PRE_RAM__ +u8 google_chromeec_get_event(void) +{ + printk(BIOS_ERR, "%s: Not supported.\n", __func__); + return 0; +} +#endif -- cgit v1.2.3