From d5855ec5326f7696a22e0da776a63cc350c2dd16 Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Thu, 15 Oct 2015 17:17:09 -0700 Subject: FSP1_1: Always use common code Always use the common FSP code. Remove the FSP_RAM_INIT, FSP_ROMSTAGE, FSP_STACK and FSP_STAGE_CACHE Kconfig values. BRANCH=none BUG=None TEST=Build and run on Kunimitsu Change-Id: Ib3d015cb2dc257e46c2340cc7bc09cf0ffb0492c Signed-off-by: Patrick Georgi Original-Commit-Id: 5197b1354d138759dfaa428c665de6cbfb8e8911 Original-Change-Id: I3e3c1c9e6f73009a099c1ec3688dbd8c326fc766 Original-Signed-off-by: Lee Leahy Original-Reviewed-on: https://chromium-review.googlesource.com/306142 Original-Commit-Ready: Leroy P Leahy Original-Tested-by: Leroy P Leahy Original-Reviewed-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/12158 Tested-by: build bot (Jenkins) Reviewed-by: Leroy P Leahy --- src/drivers/intel/fsp1_1/Kconfig | 17 ----------------- src/drivers/intel/fsp1_1/Makefile.inc | 10 +++++----- 2 files changed, 5 insertions(+), 22 deletions(-) (limited to 'src/drivers') diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig index d0683370e8..1e1ef18beb 100644 --- a/src/drivers/intel/fsp1_1/Kconfig +++ b/src/drivers/intel/fsp1_1/Kconfig @@ -116,22 +116,6 @@ config DISPLAY_UPD_DATA Display the user specified product data prior to memory initialization. -config FSP_RAM_INIT - bool - default n - -config FSP_ROMSTAGE - bool - default n - -config FSP_STACK - bool - default n - -config FSP_STAGE_CACHE - bool - default n - config FSP_USES_UPD bool default n @@ -146,7 +130,6 @@ config GOP_SUPPORT config ROMSTAGE_RAM_STACK_SIZE hex "Size of the romstage RAM stack in bytes" default 0x5000 - depends on FSP_STACK config USE_GENERIC_FSP_CAR_INC bool diff --git a/src/drivers/intel/fsp1_1/Makefile.inc b/src/drivers/intel/fsp1_1/Makefile.inc index 19bee827e5..bf8f6a9f96 100644 --- a/src/drivers/intel/fsp1_1/Makefile.inc +++ b/src/drivers/intel/fsp1_1/Makefile.inc @@ -25,18 +25,18 @@ verstage-y += verstage.c romstage-y += car.c romstage-y += fsp_util.c romstage-y += hob.c -romstage-$(CONFIG_FSP_RAM_INIT) += raminit.c -romstage-$(CONFIG_FSP_ROMSTAGE) += romstage.c +romstage-y += raminit.c +romstage-y += romstage.c romstage-$(CONFIG_SEPARATE_VERSTAGE) += romstage_after_verstage.S -romstage-$(CONFIG_FSP_STACK) += stack.c -romstage-$(CONFIG_FSP_STAGE_CACHE) += stage_cache.c +romstage-y += stack.c +romstage-y += stage_cache.c ramstage-$(CONFIG_GOP_SUPPORT) += fsp_gop.c ramstage-y += fsp_relocate.c ramstage-y += fsp_util.c ramstage-y += hob.c ramstage-y += ramstage.c -ramstage-$(CONFIG_FSP_STAGE_CACHE) += stage_cache.c +ramstage-y += stage_cache.c ramstage-$(CONFIG_GOP_SUPPORT) += vbt.c CPPFLAGS_common += -Isrc/drivers/intel/fsp1_1/include -- cgit v1.2.3