From 40beb36f073430b0efebf0c11b51fe46065fcaf0 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Tue, 1 Dec 2020 10:08:38 +0100 Subject: drivers/intel/fsp2_0/memory_init: Wrap calls into FSP Use a wrapper code that does nothing on x86_32, but drops to protected mode to call into FSP when running on x86_64. Tested on Intel Skylake when running in long mode. Successfully run the FSP-M which is compiled for x86_32 and then continued booting in long mode. Change-Id: I9fb37019fb0d04f74d00733ce2e365f484d97d66 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/48202 Reviewed-by: Arthur Heymans Tested-by: build bot (Jenkins) --- src/drivers/intel/fsp2_0/memory_init.c | 9 ++++++++- src/drivers/intel/fsp2_0/notify.c | 6 +++++- src/drivers/intel/fsp2_0/silicon_init.c | 10 +++++++++- 3 files changed, 22 insertions(+), 3 deletions(-) (limited to 'src/drivers') diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 27e34fef0d..bddd07f33c 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -22,6 +22,7 @@ #include #include #include +#include static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(sizeof(uint64_t)); @@ -296,7 +297,13 @@ static void do_fsp_memory_init(const struct fspm_context *context, bool s3wake) post_code(POST_FSP_MEMORY_INIT); timestamp_add_now(TS_FSP_MEMORY_INIT_START); - status = fsp_raminit(&fspm_upd, fsp_get_hob_list_ptr()); + if (ENV_X86_64) + status = protected_mode_call_2arg(fsp_raminit, + (uintptr_t)&fspm_upd, + (uintptr_t)fsp_get_hob_list_ptr()); + else + status = fsp_raminit(&fspm_upd, fsp_get_hob_list_ptr()); + post_code(POST_FSP_MEMORY_EXIT); timestamp_add_now(TS_FSP_MEMORY_INIT_END); diff --git a/src/drivers/intel/fsp2_0/notify.c b/src/drivers/intel/fsp2_0/notify.c index ee04630ca1..8a51c0bad7 100644 --- a/src/drivers/intel/fsp2_0/notify.c +++ b/src/drivers/intel/fsp2_0/notify.c @@ -5,6 +5,7 @@ #include #include #include +#include static void fsp_notify(enum fsp_notify_phase phase) { @@ -30,7 +31,10 @@ static void fsp_notify(enum fsp_notify_phase phase) post_code(POST_FSP_NOTIFY_BEFORE_END_OF_FIRMWARE); } - ret = fspnotify(¬ify_params); + if (ENV_X86_64) + ret = protected_mode_call_1arg(fspnotify, (uintptr_t)¬ify_params); + else + ret = fspnotify(¬ify_params); if (phase == AFTER_PCI_ENUM) { timestamp_add_now(TS_FSP_AFTER_ENUMERATE); diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c index 0b6540e1de..a4ffbda4cc 100644 --- a/src/drivers/intel/fsp2_0/silicon_init.c +++ b/src/drivers/intel/fsp2_0/silicon_init.c @@ -13,6 +13,7 @@ #include #include #include +#include struct fsp_header fsps_hdr; @@ -117,7 +118,14 @@ static void do_silicon_init(struct fsp_header *hdr) timestamp_add_now(TS_FSP_SILICON_INIT_START); post_code(POST_FSP_SILICON_INIT); - status = silicon_init(upd); + + if (ENV_X86_64) + status = protected_mode_call_1arg(silicon_init, (uintptr_t)upd); + else + status = silicon_init(upd); + + printk(BIOS_ERR, "FSPS returned %x\n", status); + timestamp_add_now(TS_FSP_SILICON_INIT_END); post_code(POST_FSP_SILICON_EXIT); -- cgit v1.2.3