From 3ef017c4d4975aa055f8be3dc8a5cf37250f88e2 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sun, 6 Jan 2019 14:09:31 +0100 Subject: [RFC]util/checklist: Remove this functionality It was only hooked up for galileo board when using the obsolete FSP1.1. I don't see how it can be useful... Change-Id: Ifd7cbd664cfa3b729a11c885134fd9b5de62a96c Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/30691 Reviewed-by: Angel Pons Reviewed-by: Stefan Reinauer Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/drivers/intel/fsp1_1/Kconfig | 4 ---- src/drivers/intel/fsp2_0/Kconfig | 4 ---- 2 files changed, 8 deletions(-) (limited to 'src/drivers') diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig index af6ed422a1..2575577ba4 100644 --- a/src/drivers/intel/fsp1_1/Kconfig +++ b/src/drivers/intel/fsp1_1/Kconfig @@ -86,10 +86,6 @@ config USE_GENERIC_FSP_CAR_INC The chipset can select this to use a generic cache_as_ram.inc file that should be good for all FSP based platforms. -config CHECKLIST_DATA_FILE_LOCATION - string - default "src/vendorcode/intel/fsp/fsp1_1/checklist" - config RESET_ON_INVALID_RAMSTAGE_CACHE bool "Reset the system on S3 wake when ramstage cache invalid." default n diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index 28e9e5dcd3..8156d187dc 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -146,10 +146,6 @@ config VERIFY_HOBS Verify that the HOBs required by coreboot are returned by FSP and that the resource HOBs are in the correct order and position. -config CHECKLIST_DATA_FILE_LOCATION - string - default "src/vendorcode/intel/fsp/fsp2_0/checklist" - config RESET_ON_INVALID_RAMSTAGE_CACHE bool "Reset the system on S3 wake when ramstage cache invalid." default n -- cgit v1.2.3