From f92a98c56e063b34b83a35ac655ea8127d4b546f Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Wed, 4 May 2016 11:59:19 -0700 Subject: coreboot_tables: Extend serial port description Extend the serial port description to include the input clock frequency and a payload specific value. Without the input frequency it is impossible for the payload to compute the baud-rate divisor without making an assumption about the frequency. This breaks down when the UART is able to support multiple input clock frequencies. Add the UART_PCI_ADDR Kconfig value to specify the unique PCI device being used as the console UART. Specify this value as zero when the UART is not on the PCI bus. Otherwise specify the device using bus, device and function along with setting the valid bit. Currently the only payload to consume these new fields is the EDK-II CorebootPayloadPkg. Testing on Galileo: * Edit the src/mainboard/intel/galileo/Makefile.inc file: * Add "select ADD_FSP_PDAT_FILE" * Add "select ADD_FSP_RAW_BIN" * Add "select ADD_RMU_FILE" * Place the FSP.bin file in the location specified by CONFIG_FSP_FILE * Place the pdat.bin files in the location specified by CONFIG_FSP_PDAT_FILE * Place the rmu.bin file in the location specified by CONFIG_RMU_FILE * Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate UEFIPAYLOAD.fd * Testing is successful when CorebootPayloadPkg is able to properly initialize the serial port without using built-in values. Change-Id: Id4b4455bbf9583f0d66c315d38c493a81fd852a8 Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/14609 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/drivers/uart/Kconfig | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'src/drivers/uart/Kconfig') diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig index f4ad011933..ae3e81adb1 100644 --- a/src/drivers/uart/Kconfig +++ b/src/drivers/uart/Kconfig @@ -41,3 +41,20 @@ config DRIVERS_UART_PL011 bool default n select HAVE_UART_SPECIAL + +config UART_USE_REFCLK_AS_INPUT_CLOCK + bool + default n + help + Use uart_platform_refclk to specify the input clock value. + +config UART_PCI_ADDR + hex "UART's PCI bus, device, function address" + default 0 + help + Specify zero if the UART is connected to another bus type. + For PCI based UARTs, build the value as: + * 1 << 31 - Valid bit, PCI UART in use + * Bus << 20 + * Device << 15 + * Function << 12 -- cgit v1.2.3