From a0aff6e15988f918b926c4cd222537d2f5a3f878 Mon Sep 17 00:00:00 2001 From: Shuo Liu Date: Fri, 26 Apr 2024 17:35:05 +0800 Subject: soc/intel/xeon_sp: Add get_cxl_mode Configuration variable implementation (VPD, et al) is regarded to be mainboard specific and should not be bounded to SoC codes. Add get_cxl_mode so that SoC codes do not need to get this configuration from VPD any more. TEST=Build and boot on intel/archercity CRB with no significant log differences Change-Id: I1e08e92ad769112d7e570ee12cf973451a3befc0 Signed-off-by: Shuo Liu Signed-off-by: Jincheng Li Reviewed-on: https://review.coreboot.org/c/coreboot/+/82092 Tested-by: build bot (Jenkins) Reviewed-by: Lean Sheng Tan Reviewed-by: Angel Pons --- src/drivers/ocp/include/vpd.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/drivers/ocp/include/vpd.h') diff --git a/src/drivers/ocp/include/vpd.h b/src/drivers/ocp/include/vpd.h index 8ed6a56cee..bf0bc9265e 100644 --- a/src/drivers/ocp/include/vpd.h +++ b/src/drivers/ocp/include/vpd.h @@ -3,6 +3,8 @@ #ifndef OCP_VPD_H #define OCP_VPD_H +#include + /* VPD variable for enabling/disabling FRB2 timer. 1/0: Enable/disable */ #define FRB2_TIMER "frb2_timer_enable" #define FRB2_TIMER_DEFAULT 1 /* Default value when the VPD variable is not found */ -- cgit v1.2.3