From d67edcae6e9d438f2e60f6b67d97a7d3f09cb18b Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Tue, 13 Nov 2018 19:28:07 +0100 Subject: soc/intel/common: Bring DISPLAY_MTRRS into the light Initially, I wanted to move only the Kconfig DISPLAY_MTRRS into the "Debug" menu. It turned out, though, that the code looks rather generic. No need to hide it in soc/intel/. To not bloat src/Kconfig up any further, start a new `Kconfig.debug` hierarchy just for debug options. If somebody wants to review the code if it's 100% generic, we could even get rid of HAVE_DISPLAY_MTRRS. Change-Id: Ibd0a64121bd6e4ab5d7fd835f3ac25d3f5011f24 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/29684 Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- src/drivers/intel/fsp1_1/after_raminit.S | 2 +- src/drivers/intel/fsp1_1/car.c | 4 ++-- src/drivers/intel/fsp1_1/include/fsp/ramstage.h | 1 - src/drivers/intel/fsp1_1/include/fsp/romstage.h | 1 - src/drivers/intel/fsp1_1/stack.c | 4 ++-- src/drivers/intel/fsp2_0/debug.c | 22 ++++++---------------- src/drivers/intel/fsp2_0/notify.c | 6 ++---- 7 files changed, 13 insertions(+), 27 deletions(-) (limited to 'src/drivers/intel') diff --git a/src/drivers/intel/fsp1_1/after_raminit.S b/src/drivers/intel/fsp1_1/after_raminit.S index cd56ea8dc3..cdc8e9381f 100644 --- a/src/drivers/intel/fsp1_1/after_raminit.S +++ b/src/drivers/intel/fsp1_1/after_raminit.S @@ -66,7 +66,7 @@ 1: #endif /* Display the MTRRs */ - call soc_display_mtrrs + call display_mtrrs /* * The stack contents are initialized in src/soc/intel/common/stack.c diff --git a/src/drivers/intel/fsp1_1/car.c b/src/drivers/intel/fsp1_1/car.c index 4016ba1a8e..13161d66d5 100644 --- a/src/drivers/intel/fsp1_1/car.c +++ b/src/drivers/intel/fsp1_1/car.c @@ -15,10 +15,10 @@ #include #include +#include #include #include #include -#include #include FSP_INFO_HEADER *fih_car CAR_GLOBAL; @@ -95,7 +95,7 @@ asmlinkage void after_cache_as_ram(void *chipset_context) { timestamp_add_now(TS_FSP_TEMP_RAM_EXIT_END); printk(BIOS_DEBUG, "FspTempRamExit returned successfully\n"); - soc_display_mtrrs(); + display_mtrrs(); after_cache_as_ram_stage(); } diff --git a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h index a9f6a8db22..13769b3b2d 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h +++ b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h @@ -18,7 +18,6 @@ #define _INTEL_COMMON_RAMSTAGE_H_ #include -#include #include /* diff --git a/src/drivers/intel/fsp1_1/include/fsp/romstage.h b/src/drivers/intel/fsp1_1/include/fsp/romstage.h index d79be7089c..e266beec60 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/romstage.h +++ b/src/drivers/intel/fsp1_1/include/fsp/romstage.h @@ -22,7 +22,6 @@ #include #include #include -#include #include #include #include /* chip_power_state */ diff --git a/src/drivers/intel/fsp1_1/stack.c b/src/drivers/intel/fsp1_1/stack.c index 06c0e63faa..eb2a6371a8 100644 --- a/src/drivers/intel/fsp1_1/stack.c +++ b/src/drivers/intel/fsp1_1/stack.c @@ -38,12 +38,12 @@ void *setup_stack_and_mtrrs(void) uint32_t *slot; /* Display the MTRRs */ - soc_display_mtrrs(); + display_mtrrs(); /* Top of stack needs to be aligned to a 8-byte boundary. */ slot = (void *)romstage_ram_stack_top(); num_mtrrs = 0; - max_mtrrs = soc_get_variable_mtrr_count(NULL); + max_mtrrs = get_var_mtrr_count(); /* * The upper bits of the MTRR mask need to set according to the number diff --git a/src/drivers/intel/fsp2_0/debug.c b/src/drivers/intel/fsp2_0/debug.c index 8f4dc1ea9b..d098772004 100644 --- a/src/drivers/intel/fsp2_0/debug.c +++ b/src/drivers/intel/fsp2_0/debug.c @@ -11,8 +11,8 @@ #include #include +#include #include -#include asmlinkage size_t fsp_write_line(uint8_t *buffer, size_t number_of_bytes) { @@ -28,9 +28,7 @@ void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init, const FSPM_UPD *fspm_old_upd, const FSPM_UPD *fspm_new_upd) { - /* Display the MTRRs */ - if (IS_ENABLED(CONFIG_DISPLAY_MTRRS)) - soc_display_mtrrs(); + display_mtrrs(); /* Display the UPD values */ if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA)) @@ -62,9 +60,7 @@ void fsp_debug_after_memory_init(uint32_t status) if (IS_ENABLED(CONFIG_VERIFY_HOBS)) fsp_verify_memory_init_hobs(); - /* Display the MTRRs */ - if (IS_ENABLED(CONFIG_DISPLAY_MTRRS)) - soc_display_mtrrs(); + display_mtrrs(); } /*----------- @@ -75,9 +71,7 @@ void fsp_debug_before_silicon_init(fsp_silicon_init_fn silicon_init, const FSPS_UPD *fsps_old_upd, const FSPS_UPD *fsps_new_upd) { - /* Display the MTRRs */ - if (IS_ENABLED(CONFIG_DISPLAY_MTRRS)) - soc_display_mtrrs(); + display_mtrrs(); /* Display the UPD values */ if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA)) @@ -99,9 +93,7 @@ void fsp_debug_after_silicon_init(uint32_t status) if (IS_ENABLED(CONFIG_DISPLAY_HOBS)) fsp_display_hobs(); - /* Display the MTRRs */ - if (IS_ENABLED(CONFIG_DISPLAY_MTRRS)) - soc_display_mtrrs(); + display_mtrrs(); } /*----------- @@ -129,7 +121,5 @@ void fsp_debug_after_notify(uint32_t status) if (IS_ENABLED(CONFIG_DISPLAY_HOBS)) fsp_display_hobs(); - /* Display the MTRRs */ - if (IS_ENABLED(CONFIG_DISPLAY_MTRRS)) - soc_display_mtrrs(); + display_mtrrs(); } diff --git a/src/drivers/intel/fsp2_0/notify.c b/src/drivers/intel/fsp2_0/notify.c index c3a2804327..a5c7ef07da 100644 --- a/src/drivers/intel/fsp2_0/notify.c +++ b/src/drivers/intel/fsp2_0/notify.c @@ -12,8 +12,8 @@ #include #include +#include #include -#include #include #include @@ -70,9 +70,7 @@ static void fsp_notify_dummy(void *arg) { enum fsp_notify_phase phase = (uint32_t)arg; - /* Display the MTRRs */ - if (IS_ENABLED(CONFIG_DISPLAY_MTRRS)) - soc_display_mtrrs(); + display_mtrrs(); fsp_notify(phase); if (phase == READY_TO_BOOT) -- cgit v1.2.3