From d161a2fafd14700b133b1deca7b8a9a5ca1c5283 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Wed, 19 Aug 2020 21:51:08 +0200 Subject: src/drivers: Drop unneeded empty lines MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I202e5d285612b9bf237b588ea3c006187623fdc3 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/44609 Tested-by: build bot (Jenkins) Reviewed-by: Michael Niewöhner --- src/drivers/intel/fsp1_1/fsp_util.c | 1 - src/drivers/intel/fsp1_1/include/fsp/util.h | 1 - src/drivers/intel/fsp2_0/include/fsp/api.h | 1 - src/drivers/intel/fsp2_0/include/fsp/soc_binding.h | 1 - src/drivers/intel/gma/i915_reg.h | 10 ---------- src/drivers/intel/gma/int15.c | 1 - src/drivers/intel/gma/int15.h | 1 - src/drivers/intel/gma/intel_bios.h | 1 - src/drivers/intel/i210/i210.h | 1 - 9 files changed, 18 deletions(-) (limited to 'src/drivers/intel') diff --git a/src/drivers/intel/fsp1_1/fsp_util.c b/src/drivers/intel/fsp1_1/fsp_util.c index 9e7865d968..570648c373 100644 --- a/src/drivers/intel/fsp1_1/fsp_util.c +++ b/src/drivers/intel/fsp1_1/fsp_util.c @@ -174,7 +174,6 @@ struct fsp_runtime { uint32_t hob_list; } __packed; - void fsp_set_runtime(FSP_INFO_HEADER *fih, void *hob_list) { struct fsp_runtime *fspr; diff --git a/src/drivers/intel/fsp1_1/include/fsp/util.h b/src/drivers/intel/fsp1_1/include/fsp/util.h index 23f92899e8..41ffedde1d 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/util.h +++ b/src/drivers/intel/fsp1_1/include/fsp/util.h @@ -85,7 +85,6 @@ void *get_first_hob(uint16_t type); void *get_next_guid_hob(const EFI_GUID *guid, const void *hob_start); void *get_first_guid_hob(const EFI_GUID *guid); - asmlinkage void chipset_teardown_car_main(void); #endif /* FSP1_1_UTIL_H */ diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h index e0cd96d4e6..97e2fea34d 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/api.h +++ b/src/drivers/intel/fsp2_0/include/fsp/api.h @@ -31,7 +31,6 @@ enum fsp_notify_phase { END_OF_FIRMWARE = 0xF0 }; - /* Main FSP stages */ void fsp_memory_init(bool s3wake); void fsp_silicon_init(bool s3wake); diff --git a/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h b/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h index 93e54b15bc..8781bde8d8 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h +++ b/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h @@ -31,7 +31,6 @@ #include #endif - #pragma pack(pop) #endif diff --git a/src/drivers/intel/gma/i915_reg.h b/src/drivers/intel/gma/i915_reg.h index 0f3b3d0e49..137d7673fb 100644 --- a/src/drivers/intel/gma/i915_reg.h +++ b/src/drivers/intel/gma/i915_reg.h @@ -27,7 +27,6 @@ #define IVB_GMCH_GMS_SHIFT 4 #define IVB_GMCH_GMS_MASK 0xf - /* PCI config space */ #define HPLLCC 0xc0 /* 855 only */ @@ -296,7 +295,6 @@ #define PIPE_CONTROL_DEPTH_CACHE_FLUSH (1<<0) #define PIPE_CONTROL_GLOBAL_GTT (1<<2) /* in addr dword */ - /* * Reset registers */ @@ -791,7 +789,6 @@ #define ILK_FBCQ_DIS (1<<22) #define ILK_PABSTRETCH_DIS (1<<21) - /* * Framebuffer compression for Sandybridge * @@ -801,7 +798,6 @@ #define SNB_CPU_FENCE_ENABLE (1<<29) #define DPFC_CPU_FENCE_OFFSET 0x100104 - /* * GPIO regs */ @@ -1213,7 +1209,6 @@ HSW_CXT_RENDER_SIZE(ctx_reg) + \ GEN7_CXT_VFSTATE_SIZE(ctx_reg)) - /* * Overlay regs */ @@ -1254,7 +1249,6 @@ #define _BCLRPAT_B 0x61020 #define _VSYNCSHIFT_B 0x61028 - #define HTOTAL(trans) _TRANSCODER(trans, _HTOTAL_A, _HTOTAL_B) #define HBLANK(trans) _TRANSCODER(trans, _HBLANK_A, _HBLANK_B) #define HSYNC(trans) _TRANSCODER(trans, _HSYNC_A, _HSYNC_B) @@ -1311,7 +1305,6 @@ #define ADPA_DPMS_STANDBY (2<<10) #define ADPA_DPMS_OFF (3<<10) - /* Hotplug control (945+ only) */ #define PORT_HOTPLUG_EN 0x61110 #define HDMIB_HOTPLUG_INT_EN (1 << 29) @@ -2808,7 +2801,6 @@ #define _PIPEB_FRMCOUNT_GM45 0x71040 #define _PIPEB_FLIPCOUNT_GM45 0x71044 - /* Display B control */ #define _DSPBCNTR 0x71180 #define DISPPLANE_ALPHA_TRANS_ENABLE (1<<15) @@ -3011,7 +3003,6 @@ #define FDI_PLL_FREQ_LOCK_LIMIT_MASK 0xfff00 #define FDI_PLL_FREQ_DISABLE_COUNT_LIMIT_MASK 0xff - #define _PIPEA_DATA_M1 0x60030 #define TU_SIZE(x) (((x)-1) << 25) /* default size 64 */ #define TU_SIZE_MASK 0x7e000000 @@ -3565,7 +3556,6 @@ #define TRANS_CHICKEN2(pipe) _PIPE(pipe, _TRANSA_CHICKEN2, _TRANSB_CHICKEN2) #define TRANS_CHICKEN2_TIMING_OVERRIDE (1UL<<31) - #define SOUTH_CHICKEN1 0xc2000 #define FDIA_PHASE_SYNC_SHIFT_OVR 19 #define FDIA_PHASE_SYNC_SHIFT_EN 18 diff --git a/src/drivers/intel/gma/int15.c b/src/drivers/intel/gma/int15.c index ab49604bf1..a7f3fdc18a 100644 --- a/src/drivers/intel/gma/int15.c +++ b/src/drivers/intel/gma/int15.c @@ -98,7 +98,6 @@ int intel_vga_int15_handler(void) return res; } - void install_intel_vga_int15_handler(int active_lfp_, int pfit_, int display_, int panel_type_) { active_lfp = active_lfp_; diff --git a/src/drivers/intel/gma/int15.h b/src/drivers/intel/gma/int15.h index 559ec22ab1..cddd4ac6b8 100644 --- a/src/drivers/intel/gma/int15.h +++ b/src/drivers/intel/gma/int15.h @@ -27,7 +27,6 @@ enum { GMA_INT15_ACTIVE_LFP_EDP = 0x03, }; - #if CONFIG(VGA_ROM_RUN) /* Install custom int15 handler for VGA OPROM */ void install_intel_vga_int15_handler(int active_lfp, int pfit, int display, int panel_type); diff --git a/src/drivers/intel/gma/intel_bios.h b/src/drivers/intel/gma/intel_bios.h index 3df72c71fb..558dae6aba 100644 --- a/src/drivers/intel/gma/intel_bios.h +++ b/src/drivers/intel/gma/intel_bios.h @@ -396,7 +396,6 @@ struct bdb_sdvo_lvds_options { u8 panel_misc_bits_4; } __packed; - #define BDB_DRIVER_FEATURE_NO_LVDS 0 #define BDB_DRIVER_FEATURE_INT_LVDS 1 #define BDB_DRIVER_FEATURE_SDVO_LVDS 2 diff --git a/src/drivers/intel/i210/i210.h b/src/drivers/intel/i210/i210.h index 46e9788905..718992e477 100644 --- a/src/drivers/intel/i210/i210.h +++ b/src/drivers/intel/i210/i210.h @@ -16,7 +16,6 @@ #define I210_DONE 0x02 /* command done bit */ #define I210_TARGET_CHECKSUM 0xBABA /* resulting checksum */ - /*define some other useful values here */ #define I210_POLL_TIMEOUT_US 300000 /* 300 ms */ /*Define some error states here*/ -- cgit v1.2.3