From 9be1a115f141ce29ef9527b4bf954189c336546a Mon Sep 17 00:00:00 2001 From: Andrey Petrov Date: Sat, 14 May 2016 16:32:39 -0700 Subject: drivers/intel/fsp2_0: Add recipes for FSP blobs in CBFS Add recipes that insert FSP blobs into CBFS and get rid of CBFS names hardcoding. Change-Id: I350abeffc4d23e45e339464d036716ecdb2ba83a Signed-off-by: Andrey Petrov Reviewed-on: https://review.coreboot.org/14818 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/drivers/intel/fsp2_0/Kconfig | 28 ++++++++++++++++++++++++++++ src/drivers/intel/fsp2_0/Makefile.inc | 10 ++++++++++ src/drivers/intel/fsp2_0/memory_init.c | 3 +-- src/drivers/intel/fsp2_0/silicon_init.c | 3 +-- 4 files changed, 40 insertions(+), 4 deletions(-) (limited to 'src/drivers/intel') diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index 19e04f7215..6cfacad6bb 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -3,4 +3,32 @@ config PLATFORM_USES_FSP2_0 help Include FSP 2.0 wrappers and functionality +if PLATFORM_USES_FSP2_0 +config ADD_FSP_BINARIES + bool "Add Intel FSP 2.0 binaries to CBFS" + help + Add the FSP-M and FSP-S binaries to CBFS. Currently coreboot does not + use the FSP-T binary and it is not added. + +config FSP_S_CBFS + string "Name of FSP-S in CBFS" + default "fsps.bin" + +config FSP_M_CBFS + string "Name of FSP-M in CBFS" + default "fspm.bin" + +config FSP_M_FILE + string "Intel FSP-M (memory init) binary path and filename" + depends on ADD_FSP_BINARIES + help + The path and filename of the Intel FSP-M binary for this platform. + +config FSP_S_FILE + string "Intel FSP-S (silicon init) binary path and filename" + depends on ADD_FSP_BINARIES + help + The path and filename of the Intel FSP-S binary for this platform. + +endif diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc index 3e94f2fffb..ff82390f24 100644 --- a/src/drivers/intel/fsp2_0/Makefile.inc +++ b/src/drivers/intel/fsp2_0/Makefile.inc @@ -25,4 +25,14 @@ ramstage-y += util.c CPPFLAGS_common += -I$(src)/drivers/intel/fsp2_0/include +# Add FSP blobs into cbfs. SoC code may supply additional options with +# -options, e.g --xip or -b +cbfs-files-$(CONFIG_ADD_FSP_BINARIES) += $(CONFIG_FSP_M_CBFS) +$(CONFIG_FSP_M_CBFS)-file := $(call strip_quotes,$(CONFIG_FSP_M_FILE)) +$(CONFIG_FSP_M_CBFS)-type := fsp + +cbfs-files-$(CONFIG_ADD_FSP_BINARIES) += $(CONFIG_FSP_S_CBFS) +$(CONFIG_FSP_S_CBFS)-file := $(call strip_quotes,$(CONFIG_FSP_S_FILE)) +$(CONFIG_FSP_S_CBFS)-type := fsp + endif diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 8033937455..c1c2fe4670 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -65,8 +65,7 @@ enum fsp_status fsp_memory_init(void **hob_list, struct range_entry *range) { struct fsp_header hdr; - /* TODO: do not hardcode CBFS file names */ - if (fsp_load_binary(&hdr, "blobs/fspm.bin", range) != CB_SUCCESS) + if (fsp_load_binary(&hdr, CONFIG_FSP_M_CBFS, range) != CB_SUCCESS) return FSP_NOT_FOUND; return do_fsp_memory_init(hob_list, &hdr); diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c index e7d8c54ce1..18aded544f 100644 --- a/src/drivers/intel/fsp2_0/silicon_init.c +++ b/src/drivers/intel/fsp2_0/silicon_init.c @@ -54,8 +54,7 @@ static enum fsp_status do_silicon_init(struct fsp_header *hdr) enum fsp_status fsp_silicon_init(struct range_entry *range) { /* Load FSP-S and save FSP header. We will need it for Notify */ - /* TODO: do not hardcode CBFS file names */ - if (fsp_load_binary(&fsps_hdr, "blobs/fsps.bin", range) != CB_SUCCESS) + if (fsp_load_binary(&fsps_hdr, CONFIG_FSP_S_CBFS, range) != CB_SUCCESS) return FSP_NOT_FOUND; return do_silicon_init(&fsps_hdr); -- cgit v1.2.3