From 216db613a7dfbad3bfb150e3ae9927f5e970cd4c Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Wed, 11 Sep 2019 09:57:14 +0300 Subject: intel/fsp2_0: Move TS_BEFORE_INITRAM MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Exclude FSP-M loading from the timestamps used for RAM detection and training process. Change-Id: I859b292f2347c6f0e3e41555ad4fb8d95a139007 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/35371 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Subrata Banik Reviewed-by: Furquan Shaikh --- src/drivers/intel/fsp2_0/memory_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/drivers/intel') diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 1386d2c9f2..5765fb7311 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -392,8 +392,6 @@ void fsp_memory_init(bool s3wake) struct memranges memmap; struct range_entry freeranges[2]; - timestamp_add_now(TS_BEFORE_INITRAM); - if (CONFIG(ELOG_BOOT_COUNT) && !s3wake) boot_count_increment(); @@ -421,6 +419,8 @@ void fsp_memory_init(bool s3wake) /* Signal that FSP component has been loaded. */ prog_segment_loaded(hdr.image_base, hdr.image_size, SEG_FINAL); + timestamp_add_now(TS_BEFORE_INITRAM); + do_fsp_memory_init(&hdr, s3wake, &memmap); timestamp_add_now(TS_AFTER_INITRAM); -- cgit v1.2.3