From e184e39e2ed9ac3f76d2c4f2cc830e335a216e45 Mon Sep 17 00:00:00 2001 From: Tim Wawrzynczak Date: Thu, 14 May 2020 10:23:19 -0600 Subject: drivers/intel/pmc_mux/con: Add new PMC MUX & CON chip drivers The Tiger Lake PMC device has a MUX device which is expected to be exposed in ACPI tables. The MUX device simply has a _HID and _DDN. The CON devices link the USB-2 and USB-3 port numbers (from SoC point of view) to the physical connector. They also have orientation options for the sideband (SBU) and USB High Speed signals (HSL), meaning that they can be fixed (i.e, another device besides the SoC controls the orientation, and effectively the SoC is following only CC1 or CC2 orientation), or they can follow the CC lines. BUG=b:151646486 TEST=Tested with next patch in series (see TEST line there) Change-Id: I8b5f275907601960410459aa669e257b80ff3dc2 Signed-off-by: Tim Wawrzynczak Signed-off-by: John Zhao Reviewed-on: https://review.coreboot.org/c/coreboot/+/40862 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie --- src/drivers/intel/pmc_mux/Kconfig | 7 +++++++ 1 file changed, 7 insertions(+) create mode 100644 src/drivers/intel/pmc_mux/Kconfig (limited to 'src/drivers/intel/pmc_mux/Kconfig') diff --git a/src/drivers/intel/pmc_mux/Kconfig b/src/drivers/intel/pmc_mux/Kconfig new file mode 100644 index 0000000000..24eb1a19d3 --- /dev/null +++ b/src/drivers/intel/pmc_mux/Kconfig @@ -0,0 +1,7 @@ +config DRIVERS_INTEL_PMC + bool + default n + depends on HAVE_ACPI_TABLES + help + When enabled, driver/intel/pmc_mux will add support for mux + configuration of USB Type-C ports via the SoC's muxes. -- cgit v1.2.3