From 771c3aca70e6fa8eb0b3ad5f6b6478578bfb5e85 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Thu, 1 Aug 2013 13:58:17 -0700 Subject: Slippy/Falco: Fill in right values for PHSYNC and PVSYNC in transcoder flags Depending upon the values decoded from edid, the function decides the appropriate bits to be set in flags parameter (Important for fastboot to work correctly in kernel) Change-Id: I3b0f914dc2b0fd887eb6a1f706f87b87c86ff856 Reviewed-on: https://gerrit.chromium.org/gerrit/64265 Reviewed-by: Ronald G. Minnich Commit-Queue: Furquan Shaikh Tested-by: Furquan Shaikh Reviewed-on: http://review.coreboot.org/4423 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/drivers/intel/gma/i915.h | 4 +++- src/drivers/intel/gma/intel_ddi.c | 10 ++++++++-- 2 files changed, 11 insertions(+), 3 deletions(-) (limited to 'src/drivers/intel/gma') diff --git a/src/drivers/intel/gma/i915.h b/src/drivers/intel/gma/i915.h index 12a7ee02bb..9a6314e32b 100644 --- a/src/drivers/intel/gma/i915.h +++ b/src/drivers/intel/gma/i915.h @@ -228,7 +228,9 @@ u32 intel_ddi_calc_transcoder_flags(u32 pipe_bpp, enum pipe pipe, int type, int lane_count, - int pf_sz); + int pf_sz, + u8 phsync, + u8 pvsync); enum transcoder intel_ddi_get_transcoder(enum port port, enum pipe pipe); diff --git a/src/drivers/intel/gma/intel_ddi.c b/src/drivers/intel/gma/intel_ddi.c index ff8ad4cf9e..9ddd781c97 100644 --- a/src/drivers/intel/gma/intel_ddi.c +++ b/src/drivers/intel/gma/intel_ddi.c @@ -163,7 +163,9 @@ u32 intel_ddi_calc_transcoder_flags(u32 pipe_bpp, enum pipe pipe, int type, int lane_count, - int pf_sz) + int pf_sz, + u8 phsync, + u8 pvsync) { u32 temp; @@ -206,7 +208,11 @@ u32 intel_ddi_calc_transcoder_flags(u32 pipe_bpp, } } - /* We need to check for TRANS_DDI_PVSYNC and TRANS_DDI_PHSYNC -- How? */ + if (phsync) + temp |= TRANS_DDI_PHSYNC; + + if (pvsync) + temp |= TRANS_DDI_PVSYNC; if (type == INTEL_OUTPUT_HDMI) { /* Need to understand when to set TRANS_DDI_MODE_SELECT_HDMI / TRANS_DDI_MODE_SELECT_DVI */ -- cgit v1.2.3