From 06c8c0d1fed29f488fda1c7d3bc13a7edfed1be3 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Thu, 29 Mar 2018 15:11:10 +0200 Subject: drivers/intel/gma: Amend stride calculation of linear fb Aligning the stride up to a multiple of 64 pixels was flawed: We want to actually align up to one cacheline (64 bytes) as that's the mini- mum what the hardware supports. Change-Id: I3f824ffd7d12835935e4e4bde29fe82dc3e16f9d Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/25451 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/drivers/intel/gma/hires_fb/gma.adb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/drivers/intel/gma') diff --git a/src/drivers/intel/gma/hires_fb/gma.adb b/src/drivers/intel/gma/hires_fb/gma.adb index b1168acd4d..086da9b80f 100644 --- a/src/drivers/intel/gma/hires_fb/gma.adb +++ b/src/drivers/intel/gma/hires_fb/gma.adb @@ -83,7 +83,7 @@ is (Width => Width_Type (min_h), Height => Height_Type (min_v), BPC => 8, - Stride => ((Width_Type (min_h) + 63) / 64) * 64, + Stride => Div_Round_Up (Width_Type (min_h), 16) * 16, Offset => 0); for i in Pipe_Index loop exit when configs (i).Port = Disabled; -- cgit v1.2.3