From 681ef51d731617a0a4d5b604d561acdecb9c9cfa Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 11 Feb 2018 01:17:01 -0600 Subject: drivers/intel/gma: fix opregion SCI register for Atom platforms Most Intel platforms use separate registers for software-based SMI (0xe0) and SCI (0xe8), but Atom-based platforms use a single combined register (0xe0) for both. Adjust opregion implementation to use the correct register for Atom-based platforms. Test: Boot Windows on Atom-based ChromeOS device with Tianocore payload and non-VBIOS graphics init; observe Intel display driver loaded correctly and internal display not blank. (requires additional change for Atom platforms to select CONFIG_INTEL_GMA_SWSMISCI) Change-Id: I636986226ff951dae637dca5bc3ad0e023d94243 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/23696 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/drivers/intel/gma/opregion.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/drivers/intel/gma/opregion.h') diff --git a/src/drivers/intel/gma/opregion.h b/src/drivers/intel/gma/opregion.h index 3ae68e527b..8ef3dcf9be 100644 --- a/src/drivers/intel/gma/opregion.h +++ b/src/drivers/intel/gma/opregion.h @@ -25,6 +25,7 @@ /* IGD PCI Configuration register */ #define ASLS 0xfc /* OpRegion Base */ #define SWSCI 0xe8 /* SWSCI Register */ +#define SWSMISCI 0xe0 /* SWSMISCI Register */ #define GSSCIE (1 << 0) /* SCI Event trigger */ #define SMISCISEL (1 << 15) /* Select SMI or SCI event source */ -- cgit v1.2.3