From 612a8676779f873f2f7a3c8011ad0eac61ca38f9 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Tue, 19 Feb 2019 19:11:29 +0100 Subject: drivers/intel/gma/acpi: Add Kconfigs for backlight registers Instead of adding more versions of the `*pch.asl`, unify the existing ones and allow to override the register locations via Kconfig. The current defaults should work for Skylake and some newer platforms. TEST=Booted ThinkPad X201s, backlight control still works. Change-Id: I0b21d9a0288f0f8d6cb0a4776909bffdae7576f5 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/coreboot/+/31503 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Wim Vervoorn Reviewed-by: Benjamin Doron --- src/drivers/intel/gma/acpi/gma.asl | 30 ++++++++++++++++++++++++++++++ src/drivers/intel/gma/acpi/non-pch.asl | 29 ----------------------------- src/drivers/intel/gma/acpi/pch.asl | 30 ------------------------------ 3 files changed, 30 insertions(+), 59 deletions(-) create mode 100644 src/drivers/intel/gma/acpi/gma.asl delete mode 100644 src/drivers/intel/gma/acpi/non-pch.asl delete mode 100644 src/drivers/intel/gma/acpi/pch.asl (limited to 'src/drivers/intel/gma/acpi') diff --git a/src/drivers/intel/gma/acpi/gma.asl b/src/drivers/intel/gma/acpi/gma.asl new file mode 100644 index 0000000000..57563933ce --- /dev/null +++ b/src/drivers/intel/gma/acpi/gma.asl @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* This file is part of the coreboot project. */ + +Device (GFX0) +{ + Name (_ADR, 0x00020000) + + OperationRegion (GFXC, PCI_Config, 0x00, 0x0100) + Field (GFXC, DWordAcc, NoLock, Preserve) + { + Offset (0x10), + BAR0, 64, + Offset (0xe4), + ASLE, 32, + Offset (0xfc), + ASLS, 32, + } + + OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000) + Field (GFRG, DWordAcc, NoLock, Preserve) + { + Offset (CONFIG_INTEL_GMA_BCLV_OFFSET), + BCLV, CONFIG_INTEL_GMA_BCLV_WIDTH, + Offset (CONFIG_INTEL_GMA_BCLM_OFFSET), + BCLM, CONFIG_INTEL_GMA_BCLM_WIDTH + } + +#include "configure_brightness_levels.asl" +#include "common.asl" +} diff --git a/src/drivers/intel/gma/acpi/non-pch.asl b/src/drivers/intel/gma/acpi/non-pch.asl deleted file mode 100644 index b656d484c9..0000000000 --- a/src/drivers/intel/gma/acpi/non-pch.asl +++ /dev/null @@ -1,29 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* This file is part of the coreboot project. */ - -Device (GFX0) -{ - Name (_ADR, 0x00020000) - - OperationRegion (GFXC, PCI_Config, 0x00, 0x0100) - Field (GFXC, DWordAcc, NoLock, Preserve) - { - Offset (0x10), - BAR0, 64, - Offset (0xe4), - ASLE, 32, - Offset (0xfc), - ASLS, 32, - } - - OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000) - Field (GFRG, DWordAcc, NoLock, Preserve) - { - Offset (0x61254), - BCLV, 16, - BCLM, 16, - } - -#include "configure_brightness_levels.asl" -#include "common.asl" -} diff --git a/src/drivers/intel/gma/acpi/pch.asl b/src/drivers/intel/gma/acpi/pch.asl deleted file mode 100644 index 942ccf433c..0000000000 --- a/src/drivers/intel/gma/acpi/pch.asl +++ /dev/null @@ -1,30 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* This file is part of the coreboot project. */ - -Device (GFX0) -{ - Name (_ADR, 0x00020000) - - OperationRegion (GFXC, PCI_Config, 0x00, 0x0100) - Field (GFXC, DWordAcc, NoLock, Preserve) - { - Offset (0x10), - BAR0, 64, - Offset (0xe4), - ASLE, 32, - Offset (0xfc), - ASLS, 32, - } - - OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000) - Field (GFRG, DWordAcc, NoLock, Preserve) - { - Offset (0x48254), - BCLV, 16, - Offset (0xc8256), - BCLM, 16 - } - -#include "configure_brightness_levels.asl" -#include "common.asl" -} -- cgit v1.2.3