From ed0c83877f453b94a5e68bef62d6dbba1b97f0d2 Mon Sep 17 00:00:00 2001 From: Mohan D'Costa Date: Thu, 18 Sep 2014 15:57:06 +0900 Subject: intel/fsp_baytrail: Add S3 suspend/resume Support This adds S3 Suspend / Resume support to Intel's Bay Trail FSP It is based on the "src/soc/intel/baytrail/romstage/romstage.c" implementation. Change-Id: If0011068eb7290d1b764c5c4b12c17375fb69008 Signed-off-by: Mohan D'Costa Reviewed-on: http://review.coreboot.org/6937 Reviewed-by: Paul Menzel Reviewed-by: Martin Roth Tested-by: build bot (Jenkins) --- src/drivers/intel/fsp/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/drivers/intel/fsp') diff --git a/src/drivers/intel/fsp/Kconfig b/src/drivers/intel/fsp/Kconfig index 5e4404646e..2d41365320 100644 --- a/src/drivers/intel/fsp/Kconfig +++ b/src/drivers/intel/fsp/Kconfig @@ -63,6 +63,7 @@ config ENABLE_FSP_FAST_BOOT config ENABLE_MRC_CACHE bool + default y if HAVE_ACPI_RESUME default n help Enabling this feature will cause MRC data to be cached in NV storage. -- cgit v1.2.3