From 585210ad587675067d59e8f408be4d2f5a860acf Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Tue, 16 Oct 2018 11:54:37 -0700 Subject: drivers/intel/fsp*: Use newly added post codes for memory param prep This change replaces use of post codes 0x34 and 0x36 in fsp drivers to instead use POST_MEM_PREINIT_PREP_{START,END} to make it easy to search from where these post codes are generated during boot flow. Additionally, it adds POST_MEM_PREINIT_PREP_END to fsp2_0 memory_init to make it consistent with fsp1_1 memory init. Change-Id: I307ada1679f212c424e9f7ad2c9d254e24f41fd3 Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/29151 Tested-by: build bot (Jenkins) Reviewed-by: Karthik Ramasubramanian Reviewed-by: Aaron Durbin --- src/drivers/intel/fsp2_0/memory_init.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src/drivers/intel/fsp2_0') diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index dc37eaaf1b..1026c7982d 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -273,7 +273,7 @@ static void do_fsp_memory_init(struct fsp_header *hdr, bool s3wake, FSPM_ARCH_UPD *arch_upd; uint32_t fsp_version; - post_code(0x34); + post_code(POST_MEM_PREINIT_PREP_START); fsp_version = fsp_memory_settings_version(hdr); @@ -301,6 +301,8 @@ static void do_fsp_memory_init(struct fsp_header *hdr, bool s3wake, if (IS_ENABLED(CONFIG_MMA)) setup_mma(&fspm_upd.FspmConfig); + post_code(POST_MEM_PREINIT_PREP_END); + /* Call FspMemoryInit */ fsp_raminit = (void *)(hdr->image_base + hdr->memory_init_entry_offset); fsp_debug_before_memory_init(fsp_raminit, upd, &fspm_upd); -- cgit v1.2.3