From 48b6be81a5753779f036818a62dd9d61c6abc9c0 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 15 May 2019 20:08:55 +0530 Subject: Remove remaining unnecessary ENV_RAMSTAGE guard TEST=Able to build coreboot for CML. Change-Id: I8a6a97d59277ebfc498c83bb039436ed7c89d2cd Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/32802 Tested-by: build bot (Jenkins) Reviewed-by: ron minnich --- src/drivers/intel/fsp2_0/include/fsp/info_header.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/drivers/intel/fsp2_0') diff --git a/src/drivers/intel/fsp2_0/include/fsp/info_header.h b/src/drivers/intel/fsp2_0/include/fsp/info_header.h index e0659243ba..3e86b29c8d 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/info_header.h +++ b/src/drivers/intel/fsp2_0/include/fsp/info_header.h @@ -44,7 +44,6 @@ struct fsp_header { enum cb_err fsp_identify(struct fsp_header *hdr, const void *fsp_blob); -#if ENV_RAMSTAGE /* * This is a FSP_INFO_HEADER that came from fsps.bin blob. It contains * both SiliconInit and Notify APIs. When SiliconInit is loaded the @@ -52,6 +51,5 @@ enum cb_err fsp_identify(struct fsp_header *hdr, const void *fsp_blob); * header parsing again. */ extern struct fsp_header fsps_hdr; -#endif #endif /* _FSP2_0_INFO_HEADER_H_ */ -- cgit v1.2.3