From 1d260e65739e60cb0e3a72c38aded614ea4b193e Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Mon, 9 Sep 2019 13:55:42 +0530 Subject: intel/fsp2_0: Add help text for FSP_TEMP_RAM_SIZE Kconfig MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For CML & ICL, FSP requires at least heap = 0x10000 and stack = 0x20000. Refer to FSP integration guide to know the exact FSP requirement. BUG=b:140268415 TEST=Build and boot CML-Hatch and ICL. Change-Id: Ic1463181b4a9dca136d00cb2f7e3cce4f7e57bd6 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/35301 Reviewed-by: Kyösti Mälkki Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/drivers/intel/fsp2_0/Kconfig | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'src/drivers/intel/fsp2_0') diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index 541ec47b46..1e84dabbbe 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -154,8 +154,12 @@ config FSP_USES_CB_STACK config FSP_TEMP_RAM_SIZE hex - default 0x10000 depends on FSP_USES_CB_STACK + help + The amount of anticipated heap usage in CAR by FSP to setup HOB. + This configuration is applicable for FSP specification using shared + stack with coreboot/bootloader. + Sync this value with Platform FSP integration guide recommendation. config VERIFY_HOBS bool "Verify the FSP hand-off-blocks" -- cgit v1.2.3