From 4949a3dd626560aa504cee18d936d0d7602becfa Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 9 Jan 2021 20:38:43 +0200 Subject: drivers/intel/fsp1_1,fsp2_0: Refactor logo display MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hide the detail of allocation from cbmem from the FSP. Loading of a BMP logo file from CBFS is not tied to FSP version and we do not need two copies of the code, move it under lib/. Change-Id: I909f2771af534993cf8ba99ff0acd0bbd2c78f04 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/50359 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/drivers/intel/fsp2_0/include/fsp/api.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'src/drivers/intel/fsp2_0/include') diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h index 97e2fea34d..63018c58db 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/api.h +++ b/src/drivers/intel/fsp2_0/include/fsp/api.h @@ -59,16 +59,13 @@ int soc_fsp_multi_phase_init_is_enable(void); uint8_t fsp_memory_mainboard_version(void); uint8_t fsp_memory_soc_version(void); -/* Load logo to be displayed by FSP */ -const struct cbmem_entry *fsp_load_logo(UINT32 *logo_ptr, UINT32 *logo_size); - /* Callback after processing FSP notify */ void platform_fsp_notify_status(enum fsp_notify_phase phase); /* Initialize memory margin analysis settings. */ void setup_mma(FSP_M_CONFIG *memory_cfg); /* Update the SOC specific logo param and load the logo. */ -const struct cbmem_entry *soc_load_logo(FSPS_UPD *supd); +void soc_load_logo(FSPS_UPD *supd); /* Update the SOC specific memory config param for mma. */ void soc_update_memory_params_for_mma(FSP_M_CONFIG *memory_cfg, struct mma_config_param *mma_cfg); -- cgit v1.2.3