From 0a5971c91bac57970e3f3229b8cda735a17b3a67 Mon Sep 17 00:00:00 2001 From: Brenton Dong Date: Tue, 18 Oct 2016 11:35:15 -0700 Subject: drivers/intel/fsp2_0: add FSP TempRamInit & TempRamExit API support FSP v2.0 Specification adds APIs TempRamInit & TempRamExit for Cache-As-Ram initialization and teardown. Add fsp2_0 driver support for TempRamInit & TempRamExit APIs. Verified on Intel Leaf Hill CRB and confirmed that Cache-As-Ram is correctly set up and torn down using the FSP v2.0 APIs without coreboot implementation of CAR init/teardown. Change-Id: I482ff580e1b5251a8214fe2e3d2d38bd5f3e3ed2 Signed-off-by: Brenton Dong Reviewed-on: https://review.coreboot.org/17062 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/drivers/intel/fsp2_0/include/fsp/api.h | 1 + src/drivers/intel/fsp2_0/include/fsp/info_header.h | 2 ++ src/drivers/intel/fsp2_0/include/fsp/util.h | 1 + 3 files changed, 4 insertions(+) (limited to 'src/drivers/intel/fsp2_0/include/fsp') diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h index 090b50d1da..3b4334d804 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/api.h +++ b/src/drivers/intel/fsp2_0/include/fsp/api.h @@ -40,6 +40,7 @@ enum fsp_notify_phase { /* Main FSP stages */ void fsp_memory_init(bool s3wake); void fsp_silicon_init(bool s3wake); +void fsp_temp_ram_exit(void); /* Callbacks for updating stage-specific parameters */ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version); diff --git a/src/drivers/intel/fsp2_0/include/fsp/info_header.h b/src/drivers/intel/fsp2_0/include/fsp/info_header.h index 6351b32e63..c84c33ee8d 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/info_header.h +++ b/src/drivers/intel/fsp2_0/include/fsp/info_header.h @@ -34,6 +34,8 @@ struct fsp_header { uint16_t component_attribute; size_t cfg_region_offset; size_t cfg_region_size; + size_t temp_ram_init_entry; + size_t temp_ram_exit_entry; size_t notify_phase_entry_offset; size_t memory_init_entry_offset; size_t silicon_init_entry_offset; diff --git a/src/drivers/intel/fsp2_0/include/fsp/util.h b/src/drivers/intel/fsp2_0/include/fsp/util.h index 04f8c006ce..13c6ab27a7 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/util.h +++ b/src/drivers/intel/fsp2_0/include/fsp/util.h @@ -101,6 +101,7 @@ void fsp_handle_reset(uint32_t status); /* SoC/chipset must provide this to handle platform-specific reset codes */ void chipset_handle_reset(uint32_t status); +typedef asmlinkage uint32_t (*temp_ram_exit_fn)(void *param); typedef asmlinkage uint32_t (*fsp_memory_init_fn) (void *raminit_upd, void **hob_list); typedef asmlinkage uint32_t (*fsp_silicon_init_fn)(void *silicon_upd); -- cgit v1.2.3