From 33d9c4ad7e9e8048e90858edd8e0212e23a0ac8e Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 26 May 2020 18:26:54 +0530 Subject: drivers/intel/fsp2_0: Add FSP 2.2 specific support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit • Based on FSP EAS v2.1 – Backward compatibility is retained. • Add multi-phase silicon initialization to increase the modularity of the FspSiliconInit() API. • Add FspMultiPhaseSiInit() API • FSP_INFO_HEADER changes o Added FspMultiPhaseSiInitEntryOffset • Add FSPS_ARCH_UPD o Added EnableMultiPhaseSiliconInit, bootloaders designed for FSP 2.0/2.1 can disable the FspMultiPhaseSiInit() API and continue to use FspSiliconInit() without change. FSP 2.2 Specification: https://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-support-package/intel-fsp-overview.html Change-Id: If7177a267f3a9b4cbb60a639f1c737b9a3341913 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/41728 Reviewed-by: Srinidhi N Kaushik Tested-by: build bot (Jenkins) --- src/drivers/intel/fsp2_0/include/fsp/upd.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'src/drivers/intel/fsp2_0/include/fsp/upd.h') diff --git a/src/drivers/intel/fsp2_0/include/fsp/upd.h b/src/drivers/intel/fsp2_0/include/fsp/upd.h index bcfee6c727..979cff3b91 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/upd.h +++ b/src/drivers/intel/fsp2_0/include/fsp/upd.h @@ -54,4 +54,22 @@ struct FSPM_ARCH_UPD { uint8_t Reserved1[8]; } __packed; +struct FSPS_ARCH_UPD { + /// + /// Revision of the structure. For FSP v2.2 value is 1. + /// + uint8_t Revision; + uint8_t Reserved[3]; + /// + /// Length of the structure in bytes. The current value for this field is 32 + /// + uint32_t Length; + uint8_t Reserved1[4]; + /// + /// To enable multi-phase silicon initialization the bootloader must set non-zero value + /// + uint8_t EnableMultiPhaseSiliconInit; + uint8_t Reserved2[19]; +} __packed; + #endif /* _FSP2_0_UPD_H_ */ -- cgit v1.2.3