From 33d9c4ad7e9e8048e90858edd8e0212e23a0ac8e Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 26 May 2020 18:26:54 +0530 Subject: drivers/intel/fsp2_0: Add FSP 2.2 specific support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit • Based on FSP EAS v2.1 – Backward compatibility is retained. • Add multi-phase silicon initialization to increase the modularity of the FspSiliconInit() API. • Add FspMultiPhaseSiInit() API • FSP_INFO_HEADER changes o Added FspMultiPhaseSiInitEntryOffset • Add FSPS_ARCH_UPD o Added EnableMultiPhaseSiliconInit, bootloaders designed for FSP 2.0/2.1 can disable the FspMultiPhaseSiInit() API and continue to use FspSiliconInit() without change. FSP 2.2 Specification: https://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-support-package/intel-fsp-overview.html Change-Id: If7177a267f3a9b4cbb60a639f1c737b9a3341913 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/41728 Reviewed-by: Srinidhi N Kaushik Tested-by: build bot (Jenkins) --- src/drivers/intel/fsp2_0/include/fsp/info_header.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/drivers/intel/fsp2_0/include/fsp/info_header.h') diff --git a/src/drivers/intel/fsp2_0/include/fsp/info_header.h b/src/drivers/intel/fsp2_0/include/fsp/info_header.h index 7755d2a2f9..f237a378f1 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/info_header.h +++ b/src/drivers/intel/fsp2_0/include/fsp/info_header.h @@ -6,7 +6,11 @@ #include #define FSP_HDR_OFFSET 0x94 +#if CONFIG(PLATFORM_USES_FSP2_2) +#define FSP_HDR_LEN 0x4c +#else #define FSP_HDR_LEN 0x48 +#endif #define FSP_HDR_SIGNATURE "FSPH" #define FSP_HDR_ATTRIB_FSPT 1 #define FSP_HDR_ATTRIB_FSPM 2 @@ -26,6 +30,7 @@ struct fsp_header { size_t notify_phase_entry_offset; size_t memory_init_entry_offset; size_t silicon_init_entry_offset; + size_t multi_phase_si_init_entry_offset; char image_id[sizeof(uint64_t) + 1]; uint8_t revision; }; -- cgit v1.2.3