From 32ac01823b8345ecd6f557a439153cc2a75596a9 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Mon, 18 Jul 2016 00:35:42 -0500 Subject: drivers/intel/fsp2_0: load and relocate FSPS in cbmem The FSPS component loading was just loading to any memory address listed in the header. That could be anywhere in the address space including ramstage itself -- let alone corrupting the OS memory on S3 resume. Remedy this by loading and relocating FSPS into cbmem. The UEFI 2.4 header files include path are selected to provide the types necessary for FSP relocation. BUG=chrome-os-partner:52679 Change-Id: Iaba103190731fc229566a3b0231cf967522040db Signed-off-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/15742 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Andrey Petrov Reviewed-by: John Zhao --- src/drivers/intel/fsp2_0/include/fsp/api.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'src/drivers/intel/fsp2_0/include/fsp/api.h') diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h index 510163d77d..31137cc8f5 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/api.h +++ b/src/drivers/intel/fsp2_0/include/fsp/api.h @@ -14,7 +14,6 @@ #define _FSP2_0_API_H_ #include -#include #include #include #include @@ -59,7 +58,7 @@ enum fsp_notify_phase { /* Main FSP stages */ enum fsp_status fsp_memory_init(bool s3wake); -enum fsp_status fsp_silicon_init(struct range_entry *r); +enum fsp_status fsp_silicon_init(void); enum fsp_status fsp_notify(enum fsp_notify_phase phase); /* Callbacks for updating stage-specific parameters */ @@ -87,7 +86,6 @@ void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *supd); * * * ### fsp_silicon_init(): - * - r: memory range that the binary is allowed to be loaded into * * This function is responsible for loading and executing the silicon * initialization code from the FSP-S binary. It expects this binary to reside -- cgit v1.2.3