From e18e6427d0f3261f9ec361d4418b8fe1dd7cc469 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sat, 3 Jun 2017 20:03:18 -0600 Subject: src: change coreboot to lowercase MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The word 'coreboot' should always be written in lowercase, even at the start of a sentence. Change-Id: I7945ddb988262e7483da4e623cedf972380e65a2 Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/20029 Tested-by: build bot (Jenkins) Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Patrick Georgi --- src/drivers/intel/fsp1_1/cache_as_ram.inc | 2 +- src/drivers/intel/fsp1_1/raminit.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/drivers/intel/fsp1_1') diff --git a/src/drivers/intel/fsp1_1/cache_as_ram.inc b/src/drivers/intel/fsp1_1/cache_as_ram.inc index 6611fa192d..fc662082cf 100644 --- a/src/drivers/intel/fsp1_1/cache_as_ram.inc +++ b/src/drivers/intel/fsp1_1/cache_as_ram.inc @@ -137,7 +137,7 @@ CAR_init_done: /* Save FSP_INFO_HEADER location in ebx */ mov %ebp, %ebx - /* Coreboot assumes stack/heap region will be zero */ + /* coreboot assumes stack/heap region will be zero */ cld movl %ecx, %edi neg %ecx diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c index 6e2efcfabb..5b6ec9e779 100644 --- a/src/drivers/intel/fsp1_1/raminit.c +++ b/src/drivers/intel/fsp1_1/raminit.c @@ -277,7 +277,7 @@ void raminit(struct romstage_params *params) /* Verify the FSP 1.1 HOB interface */ if (fsp_verification_failure) - die("ERROR - Coreboot's requirements not met by FSP binary!\n"); + die("ERROR - coreboot's requirements not met by FSP binary!\n"); /* Display the memory configuration */ report_memory_config(); -- cgit v1.2.3