From bc8762eaef571da9f4681d09a8ec6d2a501a8115 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Wed, 25 Apr 2018 15:50:27 +0200 Subject: src: Fix a typo on "mtrr" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change "mttrs" to mtrrs. Change-Id: I4e5930cdcba5e8f5366bb2d4ebbcb659c0c2eb27 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/25823 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan Neuschäfer Reviewed-by: Martin Roth --- src/drivers/intel/fsp1_1/include/fsp/romstage.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/drivers/intel/fsp1_1') diff --git a/src/drivers/intel/fsp1_1/include/fsp/romstage.h b/src/drivers/intel/fsp1_1/include/fsp/romstage.h index 892a653769..d79be7089c 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/romstage.h +++ b/src/drivers/intel/fsp1_1/include/fsp/romstage.h @@ -54,7 +54,7 @@ struct romstage_params { * 16. src/soc/intel/common/romstage.c/romstage_common - return * 17. src/mainboard/.../romstage.c/mainboard_romstage_entry - return * 18. src/soc/intel/common/romstage.c/romstage_main - return - * 19. src/soc/intel/common/stack.c/setup_stack_and_mttrs + * 19. src/soc/intel/common/stack.c/setup_stack_and_mtrrs * 20. src/drivers/intel/fsp1_1/cache_as_ram.inc - return, cleanup * after call to romstage_main * 21. FSP binary/TempRamExit -- cgit v1.2.3