From 335eb1219c73032eee92462f76d508233fb97b55 Mon Sep 17 00:00:00 2001 From: Frans Hendriks Date: Thu, 19 Nov 2020 15:45:43 +0100 Subject: src/drivers/intel/fsp1_1/cache_as_ram.S: Clear _bss area only Whole car region is cleared, while only small part needs to be done. Clear .bss area only Tested on Facebook FBG1701 Change-Id: I021c2f7d3531c553015fde98d155915f897b434d Signed-off-by: Frans Hendriks Reviewed-on: https://review.coreboot.org/c/coreboot/+/47760 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Angel Pons --- src/drivers/intel/fsp1_1/cache_as_ram.S | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) (limited to 'src/drivers/intel/fsp1_1/cache_as_ram.S') diff --git a/src/drivers/intel/fsp1_1/cache_as_ram.S b/src/drivers/intel/fsp1_1/cache_as_ram.S index 3be9eb92df..b5b47ce9a6 100644 --- a/src/drivers/intel/fsp1_1/cache_as_ram.S +++ b/src/drivers/intel/fsp1_1/cache_as_ram.S @@ -145,14 +145,13 @@ CAR_init_done: * mm1: high 32-bits of TSC value */ - /* coreboot assumes stack/heap region will be zero */ + /* clear .bss section */ cld - movl %ecx, %edi - neg %ecx - /* Clear up to Temp Ram top. */ - add %edx, %ecx + xor %eax, %eax + movl $(_ebss), %ecx + movl $(_bss), %edi + sub %edi, %ecx shrl $2, %ecx - xorl %eax, %eax rep stosl /* Need to align stack to 16 bytes at call instruction. Account for -- cgit v1.2.3