From a90f41bdd71bd3f98c683702f90247e674a50896 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 27 Jul 2016 05:30:50 +0530 Subject: intel/fsp1_1: Add C entry support to locate FSP Temp RAM Init FSP temp ram init was getting called earlier from ROMCC bootblock. Now with C entry boot block, it is needed to locate FSP header and call FspTempRamInit. Hence add fsp 1_1 driver code to locate FSP Temp ram and execute. BUG=chrome-os-partner:55357 BRANCH=none TEST=Built kunimitsu and ensure FSP Temp Ram Init return success Change-Id: If40b267777a8dc5c473d1115b19b98609ff3fd74 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/15787 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/drivers/intel/fsp1_1/Makefile.inc | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/drivers/intel/fsp1_1/Makefile.inc') diff --git a/src/drivers/intel/fsp1_1/Makefile.inc b/src/drivers/intel/fsp1_1/Makefile.inc index 011df679f4..397bad89b2 100644 --- a/src/drivers/intel/fsp1_1/Makefile.inc +++ b/src/drivers/intel/fsp1_1/Makefile.inc @@ -20,6 +20,9 @@ verstage-y += car.c verstage-y += fsp_util.c verstage-y += verstage.c +bootblock-y += bootblock.c +bootblock-y += fsp_util.c + romstage-y += car.c romstage-y += fsp_util.c romstage-y += hob.c -- cgit v1.2.3