From fc34750c88b74f79f5bcd1d622486285af1b95d8 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sat, 3 Jan 2015 07:28:39 -0700 Subject: drivers/intel/fsp: split the UEFI HOB functions into hob.c The FSP uses a lot of UEFI HOB (Hand Off Block) functions for reporting and passing information to coreboot. These seem to me like they should be in their own file, so I'm splitting them out of fsp_util.c. I'll be adding a couple more functions in the next patch. These functions should all be compliant to the Hand Off Block spec. Change-Id: Ie8bbc0a9277b9484f13dd077b3a52e424a8600fe Signed-off-by: Martin Roth Reviewed-on: http://review.coreboot.org/8065 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc --- src/drivers/intel/fsp/Makefile.inc | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'src/drivers/intel/fsp/Makefile.inc') diff --git a/src/drivers/intel/fsp/Makefile.inc b/src/drivers/intel/fsp/Makefile.inc index 280f7b94db..7e79c08c20 100644 --- a/src/drivers/intel/fsp/Makefile.inc +++ b/src/drivers/intel/fsp/Makefile.inc @@ -17,8 +17,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # -ramstage-y += fsp_util.c -romstage-y += fsp_util.c +ramstage-y += fsp_util.c hob.c +romstage-y += fsp_util.c hob.c + ramstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c romstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c -- cgit v1.2.3