From 3f85edbcc554c4db704ed23bdfb1f384f5e2239e Mon Sep 17 00:00:00 2001 From: Andrey Petrov Date: Thu, 1 Aug 2019 14:18:06 -0700 Subject: dram: Add basic DDR4 SPD parsing Add ability to decode basic fields of DDR4 SPDs and produce SMBIOS table 17. XMP, schemas, extended field parising is totally not yet implemented. Also, put CRC function used in DDR2, DDR3 and DDR4 ina common file. Signed-off-by: Andrey Petrov Change-Id: If3befbc55cf37e1018baa432cb2f03743b929211 Reviewed-on: https://review.coreboot.org/c/coreboot/+/34680 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier Reviewed-by: David Hendricks --- src/device/dram/Makefile.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/device/dram/Makefile.inc') diff --git a/src/device/dram/Makefile.inc b/src/device/dram/Makefile.inc index c982ef49e8..f397a534f2 100644 --- a/src/device/dram/Makefile.inc +++ b/src/device/dram/Makefile.inc @@ -1 +1 @@ -romstage-y += ddr3.c ddr2.c +romstage-y += ddr4.c ddr3.c ddr2.c ddr_common.c -- cgit v1.2.3