From f4f028790a492120ce9e7b3292a17664a8c7613d Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Tue, 5 May 2015 22:24:10 +0200 Subject: 3rdparty: Move to blobs To move 3rdparty to 3rdparty/blobs (ie. below itself from git's broken perspective), we need to work around it - since some git implementations don't like the direct approach. Change-Id: I1fc84bbb37e7c8c91ab14703d609a739b5ca073c Signed-off-by: Patrick Georgi Reviewed-on: http://review.coreboot.org/10108 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/cpu/amd/geode_gx2/Makefile.inc | 2 +- src/cpu/amd/geode_lx/Kconfig | 2 +- src/cpu/amd/geode_lx/Makefile.inc | 2 +- src/cpu/intel/haswell/microcode_blob.c | 4 ++-- src/cpu/intel/model_1067x/microcode_blob.c | 2 +- src/cpu/intel/model_106cx/microcode_blob.c | 2 +- src/cpu/intel/model_2065x/microcode_blob.c | 2 +- src/cpu/intel/model_206ax/microcode_blob.c | 2 +- src/cpu/intel/model_65x/microcode_blob.c | 2 +- src/cpu/intel/model_67x/microcode_blob.c | 2 +- src/cpu/intel/model_68x/microcode_blob.c | 2 +- src/cpu/intel/model_69x/microcode_blob.c | 2 +- src/cpu/intel/model_6bx/microcode_blob.c | 2 +- src/cpu/intel/model_6dx/microcode_blob.c | 2 +- src/cpu/intel/model_6ex/microcode_blob.c | 2 +- src/cpu/intel/model_6fx/microcode_blob.c | 2 +- src/cpu/intel/model_6xx/microcode_blob.c | 2 +- src/cpu/intel/model_f0x/microcode_blob.c | 2 +- src/cpu/intel/model_f1x/microcode_blob.c | 2 +- src/cpu/intel/model_f2x/microcode_blob.c | 2 +- src/cpu/intel/model_f3x/microcode_blob.c | 2 +- src/cpu/intel/model_f4x/microcode_blob.c | 2 +- src/cpu/samsung/exynos5250/update-bl1.sh | 2 +- 23 files changed, 24 insertions(+), 24 deletions(-) (limited to 'src/cpu') diff --git a/src/cpu/amd/geode_gx2/Makefile.inc b/src/cpu/amd/geode_gx2/Makefile.inc index 751192619a..074aeda167 100644 --- a/src/cpu/amd/geode_gx2/Makefile.inc +++ b/src/cpu/amd/geode_gx2/Makefile.inc @@ -11,4 +11,4 @@ cpu_incs += $(src)/cpu/amd/geode_gx2/cache_as_ram.inc cbfs-files-$(CONFIG_GEODE_VSA_FILE) += vsa vsa-file = $(call strip_quotes,$(CONFIG_VSA_FILENAME)):vsa vsa-type = stage -vsa-required = VSA binary (binary and MASM source code available in coreboot/3rdparty repository) +vsa-required = VSA binary (binary and MASM source code available in coreboot/blobs repository) diff --git a/src/cpu/amd/geode_lx/Kconfig b/src/cpu/amd/geode_lx/Kconfig index e3e2d2e1cd..6d1fd0fc4d 100644 --- a/src/cpu/amd/geode_lx/Kconfig +++ b/src/cpu/amd/geode_lx/Kconfig @@ -37,7 +37,7 @@ config GEODE_VSA_FILE config VSA_FILENAME string "AMD Geode LX VSA path and filename" depends on GEODE_VSA_FILE - default "3rdparty/cpu/amd/geode_lx/gpl_vsa_lx_102.bin" + default "blobs/cpu/amd/geode_lx/gpl_vsa_lx_102.bin" help The path and filename of the file to use as VSA. diff --git a/src/cpu/amd/geode_lx/Makefile.inc b/src/cpu/amd/geode_lx/Makefile.inc index 4eb57bad38..ffa0688d67 100644 --- a/src/cpu/amd/geode_lx/Makefile.inc +++ b/src/cpu/amd/geode_lx/Makefile.inc @@ -11,4 +11,4 @@ cpu_incs += $(src)/cpu/amd/geode_lx/cache_as_ram.inc cbfs-files-$(CONFIG_GEODE_VSA_FILE) += vsa vsa-file = $(call strip_quotes,$(CONFIG_VSA_FILENAME)):vsa vsa-type = stage -vsa-required = VSA binary (binary and MASM source code available in coreboot/3rdparty repository) +vsa-required = VSA binary (binary and MASM source code available in coreboot/blobs repository) diff --git a/src/cpu/intel/haswell/microcode_blob.c b/src/cpu/intel/haswell/microcode_blob.c index df54ddbe8d..3338cc49b2 100644 --- a/src/cpu/intel/haswell/microcode_blob.c +++ b/src/cpu/intel/haswell/microcode_blob.c @@ -23,8 +23,8 @@ unsigned microcode[] = { * a very good reason why we only use one at a time? */ #if CONFIG_INTEL_LYNXPOINT_LP - #include "../../../../3rdparty/cpu/intel/model_4065x/microcode.h" + #include "../../../../blobs/cpu/intel/model_4065x/microcode.h" #else - #include "../../../../3rdparty/cpu/intel/model_306cx/microcode.h" + #include "../../../../blobs/cpu/intel/model_306cx/microcode.h" #endif }; diff --git a/src/cpu/intel/model_1067x/microcode_blob.c b/src/cpu/intel/model_1067x/microcode_blob.c index 36f4caf036..c98d5ff298 100644 --- a/src/cpu/intel/model_1067x/microcode_blob.c +++ b/src/cpu/intel/model_1067x/microcode_blob.c @@ -1,3 +1,3 @@ unsigned microcode_updates_1067ax[] = { - #include "../../../../3rdparty/cpu/intel/model_1067x/microcode.h" + #include "../../../../blobs/cpu/intel/model_1067x/microcode.h" }; diff --git a/src/cpu/intel/model_106cx/microcode_blob.c b/src/cpu/intel/model_106cx/microcode_blob.c index 97d36edff8..94ea96d18d 100644 --- a/src/cpu/intel/model_106cx/microcode_blob.c +++ b/src/cpu/intel/model_106cx/microcode_blob.c @@ -1,3 +1,3 @@ unsigned microcode_updates_106cx[] = { - #include "../../../../3rdparty/cpu/intel/model_106cx/microcode.h" + #include "../../../../blobs/cpu/intel/model_106cx/microcode.h" }; diff --git a/src/cpu/intel/model_2065x/microcode_blob.c b/src/cpu/intel/model_2065x/microcode_blob.c index df2e85b26f..35c5c98952 100644 --- a/src/cpu/intel/model_2065x/microcode_blob.c +++ b/src/cpu/intel/model_2065x/microcode_blob.c @@ -18,5 +18,5 @@ */ unsigned microcode[] = { - #include "../../../../3rdparty/cpu/intel/model_2065x/microcode.h" + #include "../../../../blobs/cpu/intel/model_2065x/microcode.h" }; diff --git a/src/cpu/intel/model_206ax/microcode_blob.c b/src/cpu/intel/model_206ax/microcode_blob.c index 197daf2bf9..dc1c2bd50d 100644 --- a/src/cpu/intel/model_206ax/microcode_blob.c +++ b/src/cpu/intel/model_206ax/microcode_blob.c @@ -18,5 +18,5 @@ */ unsigned microcode[] = { - #include "../../../../3rdparty/cpu/intel/model_206ax/microcode.h" + #include "../../../../blobs/cpu/intel/model_206ax/microcode.h" }; diff --git a/src/cpu/intel/model_65x/microcode_blob.c b/src/cpu/intel/model_65x/microcode_blob.c index d0f6a2a8e8..fcddd617b1 100644 --- a/src/cpu/intel/model_65x/microcode_blob.c +++ b/src/cpu/intel/model_65x/microcode_blob.c @@ -1,3 +1,3 @@ unsigned microcode_updates_65x[] = { - #include "../../../../3rdparty/cpu/intel/model_65x/microcode.h" + #include "../../../../blobs/cpu/intel/model_65x/microcode.h" }; diff --git a/src/cpu/intel/model_67x/microcode_blob.c b/src/cpu/intel/model_67x/microcode_blob.c index 1302928341..5c07456207 100644 --- a/src/cpu/intel/model_67x/microcode_blob.c +++ b/src/cpu/intel/model_67x/microcode_blob.c @@ -1,3 +1,3 @@ unsigned microcode_updates_67x[] = { - #include "../../../../3rdparty/cpu/intel/model_67x/microcode.h" + #include "../../../../blobs/cpu/intel/model_67x/microcode.h" }; diff --git a/src/cpu/intel/model_68x/microcode_blob.c b/src/cpu/intel/model_68x/microcode_blob.c index fa72086305..7246527b2a 100644 --- a/src/cpu/intel/model_68x/microcode_blob.c +++ b/src/cpu/intel/model_68x/microcode_blob.c @@ -1,3 +1,3 @@ unsigned microcode_updates_68x[] = { - #include "../../../../3rdparty/cpu/intel/model_68x/microcode.h" + #include "../../../../blobs/cpu/intel/model_68x/microcode.h" }; diff --git a/src/cpu/intel/model_69x/microcode_blob.c b/src/cpu/intel/model_69x/microcode_blob.c index a06c859398..37e19f3c1f 100644 --- a/src/cpu/intel/model_69x/microcode_blob.c +++ b/src/cpu/intel/model_69x/microcode_blob.c @@ -1,3 +1,3 @@ unsigned microcode_updates_69x[] = { - #include "../../../../3rdparty/cpu/intel/model_69x/microcode.h" + #include "../../../../blobs/cpu/intel/model_69x/microcode.h" }; diff --git a/src/cpu/intel/model_6bx/microcode_blob.c b/src/cpu/intel/model_6bx/microcode_blob.c index debd650647..cf5a95a47f 100644 --- a/src/cpu/intel/model_6bx/microcode_blob.c +++ b/src/cpu/intel/model_6bx/microcode_blob.c @@ -1,3 +1,3 @@ unsigned microcode_updates_6bx[] = { - #include "../../../../3rdparty/cpu/intel/model_6bx/microcode.h" + #include "../../../../blobs/cpu/intel/model_6bx/microcode.h" }; diff --git a/src/cpu/intel/model_6dx/microcode_blob.c b/src/cpu/intel/model_6dx/microcode_blob.c index 8f13d1b160..4871c7c80d 100644 --- a/src/cpu/intel/model_6dx/microcode_blob.c +++ b/src/cpu/intel/model_6dx/microcode_blob.c @@ -1,3 +1,3 @@ unsigned microcode_updates_6dx[] = { - #include "../../../../3rdparty/cpu/intel/model_6dx/microcode.h" + #include "../../../../blobs/cpu/intel/model_6dx/microcode.h" }; diff --git a/src/cpu/intel/model_6ex/microcode_blob.c b/src/cpu/intel/model_6ex/microcode_blob.c index e270059a4b..2068a1dc69 100644 --- a/src/cpu/intel/model_6ex/microcode_blob.c +++ b/src/cpu/intel/model_6ex/microcode_blob.c @@ -1,3 +1,3 @@ unsigned microcode_updates_6ex[] = { - #include "../../../../3rdparty/cpu/intel/model_6ex/microcode.h" + #include "../../../../blobs/cpu/intel/model_6ex/microcode.h" }; diff --git a/src/cpu/intel/model_6fx/microcode_blob.c b/src/cpu/intel/model_6fx/microcode_blob.c index 67a10cd280..371f9760ee 100644 --- a/src/cpu/intel/model_6fx/microcode_blob.c +++ b/src/cpu/intel/model_6fx/microcode_blob.c @@ -1,3 +1,3 @@ unsigned microcode_updates_6fx[] = { - #include "../../../../3rdparty/cpu/intel/model_6fx/microcode.h" + #include "../../../../blobs/cpu/intel/model_6fx/microcode.h" }; diff --git a/src/cpu/intel/model_6xx/microcode_blob.c b/src/cpu/intel/model_6xx/microcode_blob.c index ab082da664..489de4b81f 100644 --- a/src/cpu/intel/model_6xx/microcode_blob.c +++ b/src/cpu/intel/model_6xx/microcode_blob.c @@ -1,3 +1,3 @@ unsigned microcode_updates_6xx[] = { - #include "../../../../3rdparty/cpu/intel/model_6xx/microcode.h" + #include "../../../../blobs/cpu/intel/model_6xx/microcode.h" }; diff --git a/src/cpu/intel/model_f0x/microcode_blob.c b/src/cpu/intel/model_f0x/microcode_blob.c index 96577facf4..32ca360ea0 100644 --- a/src/cpu/intel/model_f0x/microcode_blob.c +++ b/src/cpu/intel/model_f0x/microcode_blob.c @@ -1,4 +1,4 @@ /* 256KB cache */ unsigned microcode_updates_f0x[] = { - #include "../../../../3rdparty/cpu/intel/model_f0x/microcode.h" + #include "../../../../blobs/cpu/intel/model_f0x/microcode.h" }; diff --git a/src/cpu/intel/model_f1x/microcode_blob.c b/src/cpu/intel/model_f1x/microcode_blob.c index bf2fe92bb8..63af4a3567 100644 --- a/src/cpu/intel/model_f1x/microcode_blob.c +++ b/src/cpu/intel/model_f1x/microcode_blob.c @@ -1,4 +1,4 @@ /* 256KB cache */ unsigned microcode_updates_f1x[] = { - #include "../../../../3rdparty/cpu/intel/model_f1x/microcode.h" + #include "../../../../blobs/cpu/intel/model_f1x/microcode.h" }; diff --git a/src/cpu/intel/model_f2x/microcode_blob.c b/src/cpu/intel/model_f2x/microcode_blob.c index 55133f2c74..6a5eee7bf9 100644 --- a/src/cpu/intel/model_f2x/microcode_blob.c +++ b/src/cpu/intel/model_f2x/microcode_blob.c @@ -1,4 +1,4 @@ /* 512KB cache */ unsigned microcode_updates_f2x[] = { - #include "../../../../3rdparty/cpu/intel/model_f2x/microcode.h" + #include "../../../../blobs/cpu/intel/model_f2x/microcode.h" }; diff --git a/src/cpu/intel/model_f3x/microcode_blob.c b/src/cpu/intel/model_f3x/microcode_blob.c index 80a0af7c68..d93912f933 100644 --- a/src/cpu/intel/model_f3x/microcode_blob.c +++ b/src/cpu/intel/model_f3x/microcode_blob.c @@ -1,3 +1,3 @@ unsigned microcode_updates_f3x[] = { - #include "../../../../3rdparty/cpu/intel/model_f3x/microcode.h" + #include "../../../../blobs/cpu/intel/model_f3x/microcode.h" }; diff --git a/src/cpu/intel/model_f4x/microcode_blob.c b/src/cpu/intel/model_f4x/microcode_blob.c index 2d9850897d..3ec4479674 100644 --- a/src/cpu/intel/model_f4x/microcode_blob.c +++ b/src/cpu/intel/model_f4x/microcode_blob.c @@ -1,3 +1,3 @@ unsigned microcode_updates_f4x[] = { - #include "../../../../3rdparty/cpu/intel/model_f4x/microcode.h" + #include "../../../../blobs/cpu/intel/model_f4x/microcode.h" }; diff --git a/src/cpu/samsung/exynos5250/update-bl1.sh b/src/cpu/samsung/exynos5250/update-bl1.sh index e47b25db9d..755239992a 100644 --- a/src/cpu/samsung/exynos5250/update-bl1.sh +++ b/src/cpu/samsung/exynos5250/update-bl1.sh @@ -1,7 +1,7 @@ #!/bin/sh BL1_NAME="E5250.nbl1.bin" -BL1_PATH="3rdparty/cpu/samsung/exynos5250/" +BL1_PATH="blobs/cpu/samsung/exynos5250/" BL1_URL="http://commondatastorage.googleapis.com/chromeos-localmirror/distfiles/exynos-pre-boot-0.0.2-r8.tbz2" get_bl1() { -- cgit v1.2.3