From f1b58b78351d7ed220673e688a2f7bc9e96da4e2 Mon Sep 17 00:00:00 2001
From: Kyösti Mälkki <kyosti.malkki@gmail.com>
Date: Fri, 1 Mar 2019 13:43:02 +0200
Subject: device/pci: Fix PCI accessor headers
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
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PCI config accessors are no longer indirectly included
from <arch/io.h> use <device/pci_ops.h> instead.

Change-Id: I2adf46430a33bc52ef69d1bf7dca4655fc8475bd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
---
 src/cpu/amd/family_10h-family_15h/init_cpus.c        | 1 +
 src/cpu/amd/family_10h-family_15h/model_10xxx_init.c | 1 +
 src/cpu/amd/family_10h-family_15h/monotonic_timer.c  | 1 +
 src/cpu/amd/family_10h-family_15h/powernow_acpi.c    | 1 +
 src/cpu/amd/family_10h-family_15h/ram_calc.c         | 1 +
 src/cpu/amd/quadcore/amd_sibling.c                   | 1 +
 src/cpu/amd/quadcore/quadcore.c                      | 1 +
 src/cpu/amd/quadcore/quadcore_id.c                   | 1 +
 src/cpu/intel/fsp_model_406dx/bootblock.c            | 1 +
 9 files changed, 9 insertions(+)

(limited to 'src/cpu')

diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c
index 2ddbc43ee6..57d4424bb1 100644
--- a/src/cpu/amd/family_10h-family_15h/init_cpus.c
+++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c
@@ -15,6 +15,7 @@
  */
 
 #include <cpu/amd/msr.h>
+#include <device/pci_ops.h>
 #include "init_cpus.h"
 
 #if IS_ENABLED(CONFIG_HAVE_OPTION_TABLE)
diff --git a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
index abf02a3690..674ba782d7 100644
--- a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
+++ b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
@@ -21,6 +21,7 @@
 #include <cpu/amd/mtrr.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <string.h>
 #include <cpu/x86/smm.h>
 #include <cpu/x86/pae.h>
diff --git a/src/cpu/amd/family_10h-family_15h/monotonic_timer.c b/src/cpu/amd/family_10h-family_15h/monotonic_timer.c
index ad83684ed3..fe01345e24 100644
--- a/src/cpu/amd/family_10h-family_15h/monotonic_timer.c
+++ b/src/cpu/amd/family_10h-family_15h/monotonic_timer.c
@@ -19,6 +19,7 @@
 #include <cpu/amd/msr.h>
 #include <timer.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <northbridge/amd/amdht/AsPsDefs.h>
 
 static struct monotonic_counter {
diff --git a/src/cpu/amd/family_10h-family_15h/powernow_acpi.c b/src/cpu/amd/family_10h-family_15h/powernow_acpi.c
index cf1646ebb4..2ce472215f 100644
--- a/src/cpu/amd/family_10h-family_15h/powernow_acpi.c
+++ b/src/cpu/amd/family_10h-family_15h/powernow_acpi.c
@@ -23,6 +23,7 @@
 #include <arch/acpigen.h>
 #include <cpu/amd/powernow.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <cpu/amd/mtrr.h>
 #include <cpu/amd/amdfam10_sysconf.h>
 #include <arch/cpu.h>
diff --git a/src/cpu/amd/family_10h-family_15h/ram_calc.c b/src/cpu/amd/family_10h-family_15h/ram_calc.c
index 57bd2fc999..0222bd0a5e 100644
--- a/src/cpu/amd/family_10h-family_15h/ram_calc.c
+++ b/src/cpu/amd/family_10h-family_15h/ram_calc.c
@@ -19,6 +19,7 @@
 #include <cpu/amd/mtrr.h>
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <device/device.h>
 #include <device/pci.h>
 
diff --git a/src/cpu/amd/quadcore/amd_sibling.c b/src/cpu/amd/quadcore/amd_sibling.c
index f9259c2745..000cb88307 100644
--- a/src/cpu/amd/quadcore/amd_sibling.c
+++ b/src/cpu/amd/quadcore/amd_sibling.c
@@ -17,6 +17,7 @@
 #include <cpu/x86/lapic.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <pc80/mc146818rtc.h>
 #include <smp/spinlock.h>
 #include <cpu/x86/mtrr.h>
diff --git a/src/cpu/amd/quadcore/quadcore.c b/src/cpu/amd/quadcore/quadcore.c
index c2d277ad3f..601675123e 100644
--- a/src/cpu/amd/quadcore/quadcore.c
+++ b/src/cpu/amd/quadcore/quadcore.c
@@ -17,6 +17,7 @@
 
 #include <arch/cpu.h>
 #include <console/console.h>
+#include <device/pci_ops.h>
 #include <pc80/mc146818rtc.h>
 #if IS_ENABLED(CONFIG_HAVE_OPTION_TABLE)
 #include "option_table.h"
diff --git a/src/cpu/amd/quadcore/quadcore_id.c b/src/cpu/amd/quadcore/quadcore_id.c
index 47d9be9e6f..5afb051ace 100644
--- a/src/cpu/amd/quadcore/quadcore_id.c
+++ b/src/cpu/amd/quadcore/quadcore_id.c
@@ -18,6 +18,7 @@
 
 #include <arch/cpu.h>
 #include <cpu/amd/multicore.h>
+#include <device/pci_ops.h>
 #ifdef __PRE_RAM__
 #include <cpu/amd/msr.h>
 #endif
diff --git a/src/cpu/intel/fsp_model_406dx/bootblock.c b/src/cpu/intel/fsp_model_406dx/bootblock.c
index 13c5d0f767..2ffbd8b09c 100644
--- a/src/cpu/intel/fsp_model_406dx/bootblock.c
+++ b/src/cpu/intel/fsp_model_406dx/bootblock.c
@@ -20,6 +20,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <reset.h>
 #include <southbridge/intel/fsp_rangeley/soc.h>
 
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