From eee6a7fa28566e1745319d608fcf4667bae57206 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Tue, 24 Sep 2013 01:36:08 -0700 Subject: am335x: Add some code for manipulating GPIOs Add code for manipulating the GPIOs on the am335x. The API is patterned after the one used for the Exynos SOCs. Change-Id: I275317304bd0682f348f72f1c77ed5613065af3f Signed-off-by: Gabe Black Reviewed-on: https://review.coreboot.org/3942 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/cpu/ti/am335x/Makefile.inc | 1 + src/cpu/ti/am335x/gpio.c | 89 ++++++++++++++++++++++++++++++++++++++++++ src/cpu/ti/am335x/gpio.h | 70 +++++++++++++++++++++++++++++++++ 3 files changed, 160 insertions(+) create mode 100644 src/cpu/ti/am335x/gpio.c create mode 100644 src/cpu/ti/am335x/gpio.h (limited to 'src/cpu') diff --git a/src/cpu/ti/am335x/Makefile.inc b/src/cpu/ti/am335x/Makefile.inc index f07564eaf5..3bfb0fe964 100644 --- a/src/cpu/ti/am335x/Makefile.inc +++ b/src/cpu/ti/am335x/Makefile.inc @@ -1,6 +1,7 @@ bootblock-y += bootblock.c bootblock-y += bootblock_media.c bootblock-y += dmtimer.c +bootblock-y += gpio.c bootblock-y += pinmux.c romstage-y += nand.c diff --git a/src/cpu/ti/am335x/gpio.c b/src/cpu/ti/am335x/gpio.c new file mode 100644 index 0000000000..d4f7edfb72 --- /dev/null +++ b/src/cpu/ti/am335x/gpio.c @@ -0,0 +1,89 @@ +/* + * Copyright 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include + +static struct am335x_gpio_regs *gpio_regs_and_bit(unsigned gpio, uint32_t *bit) +{ + unsigned bank = gpio / AM335X_GPIO_BITS_PER_BANK; + + if (bank > ARRAY_SIZE(am335x_gpio_banks)) { + printk(BIOS_ERR, "Bad gpio index %d.\n", gpio); + return NULL; + } + *bit = 1 << (gpio % 32); + return am335x_gpio_banks[bank]; +} + +void am335x_disable_gpio_irqs(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(am335x_gpio_banks); i++) + write32(&am335x_gpio_banks[i]->irqstatus_clr_0, 0xffffffff); +} + +int gpio_direction_input(unsigned gpio) +{ + uint32_t bit; + struct am335x_gpio_regs *regs = gpio_regs_and_bit(gpio, &bit); + + if (!regs) + return -1; + setbits_le32(®s->oe, bit); + return 0; +} + +int gpio_direction_output(unsigned gpio, int value) +{ + uint32_t bit; + struct am335x_gpio_regs *regs = gpio_regs_and_bit(gpio, &bit); + + if (!regs) + return -1; + if (value) + write32(®s->setdataout, bit); + else + write32(®s->cleardataout, bit); + clrbits_le32(®s->oe, bit); + return 0; +} + +int gpio_get_value(unsigned gpio) +{ + uint32_t bit; + struct am335x_gpio_regs *regs = gpio_regs_and_bit(gpio, &bit); + + if (!regs) + return -1; + return (read32(®s->datain) & bit) ? 1 : 0; +} + +int gpio_set_value(unsigned gpio, int value) +{ + uint32_t bit; + struct am335x_gpio_regs *regs = gpio_regs_and_bit(gpio, &bit); + + if (!regs) + return -1; + if (value) + write32(®s->setdataout, bit); + else + write32(®s->cleardataout, bit); + return 0; +} diff --git a/src/cpu/ti/am335x/gpio.h b/src/cpu/ti/am335x/gpio.h new file mode 100644 index 0000000000..4f4e635202 --- /dev/null +++ b/src/cpu/ti/am335x/gpio.h @@ -0,0 +1,70 @@ +/* + * Copyright 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __CPU_TI_AM335X_GPIO_H__ +#define __CPU_TI_AM335X_GPIO_H__ + +#include + +enum { + AM335X_GPIO_BITS_PER_BANK = 32 +}; + +struct am335x_gpio_regs { + uint32_t revision; // 0x0 + uint8_t _rsv0[0xc]; // 0x4-0xf + uint32_t sysconfig; // 0x10 + uint8_t _rsv1[0xc]; // 0x14-0x1f + uint32_t eoi; // 0x20 + uint32_t irqstatus_raw_0; // 0x24 + uint32_t irqstatus_raw_1; // 0x28 + uint32_t irqstatus_0; // 0x2c + uint32_t irqstatus_1; // 0x30 + uint32_t irqstatus_set_0; // 0x34 + uint32_t irqstatus_set_1; // 0x38 + uint32_t irqstatus_clr_0; // 0x3c + uint32_t irqstatus_clk_1; // 0x40 + uint32_t irqwaken_0; // 0x44 + uint32_t irqwaken_1; // 0x48 + uint8_t _rsv2[0xc8]; // 0x4c-0x113 + uint32_t sysstatus; // 0x114 + uint8_t _rsv3[0x18]; // 0x118-0x12f + uint32_t ctrl; // 0x130 + uint32_t oe; // 0x134 + uint32_t datain; // 0x138 + uint32_t dataout; // 0x13c + uint32_t leveldetect0; // 0x140 + uint32_t leveldetect1; // 0x144 + uint32_t risingdetect; // 0x148 + uint32_t fallingdetect; // 0x14c + uint32_t debouncenable; // 0x150 + uint32_t debouncingtime; // 0x154 + uint8_t _rsv4[0x38]; // 0x158-0x18f + uint32_t cleardataout; // 0x190 + uint32_t setdataout; // 0x194 +} __attribute__((packed)); + +static struct am335x_gpio_regs * const am335x_gpio_banks[] = { + (void *)0x44e07000, (void *)0x4804c000, + (void *)0x481ac000, (void *)0x481ae000 +}; + +void am335x_disable_gpio_irqs(void); + +int gpio_direction_input(unsigned gpio); +int gpio_direction_output(unsigned gpio, int value); +int gpio_get_value(unsigned gpio); +int gpio_set_value(unsigned gpio, int value); + +#endif /* __CPU_TI_AM335X_CLOCK_H__ */ -- cgit v1.2.3