From c0f2cfb0ac55eb476387b703cb561868f989c16e Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Tue, 10 Jul 2012 17:16:10 -0700 Subject: Fix comment to reference IvyBridge, too On both SandyBridge and IvyBridge BCLK is fixed at 100MHz. Have the comment reflect that. Change-Id: Ia81c3501dc3e68cf3143c3bc864dfbf88901f9f9 Signed-off-by: Stefan Reinauer Reviewed-on: http://review.coreboot.org/1336 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/cpu/intel/model_206ax/model_206ax.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/cpu') diff --git a/src/cpu/intel/model_206ax/model_206ax.h b/src/cpu/intel/model_206ax/model_206ax.h index 8259d89880..cdcc233ee6 100644 --- a/src/cpu/intel/model_206ax/model_206ax.h +++ b/src/cpu/intel/model_206ax/model_206ax.h @@ -22,7 +22,7 @@ #ifndef _CPU_INTEL_MODEL_206AX_H #define _CPU_INTEL_MODEL_206AX_H -/* SandyBridge bus clock is fixed at 100MHz */ +/* SandyBridge/IvyBridge bus clock is fixed at 100MHz */ #define SANDYBRIDGE_BCLK 100 #define IA32_FEATURE_CONTROL 0x3a -- cgit v1.2.3