From bc78e014c548ae6e6689050735875120036d0da8 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sun, 3 Nov 2019 10:29:49 +0200 Subject: cpu/intel/car/p4-netburst: Remove delay loops MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit While commented as 10 ms + 250 us, those delay loops actually accounted for a total of 840 ms. And they seem unnecessary as followup code has potentially infinite retries when polling for status changes. Tested on aopen/dxplplusu, dual-socket P4 Xeon HT model_f2x. Change-Id: Ib7d1d66ed29c62d97073872f0b7809d719ac2324 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/36595 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/cpu/intel/car/p4-netburst/cache_as_ram.S | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'src/cpu') diff --git a/src/cpu/intel/car/p4-netburst/cache_as_ram.S b/src/cpu/intel/car/p4-netburst/cache_as_ram.S index 2cd0c5e922..58e411dcc3 100644 --- a/src/cpu/intel/car/p4-netburst/cache_as_ram.S +++ b/src/cpu/intel/car/p4-netburst/cache_as_ram.S @@ -177,12 +177,6 @@ cores_counted: hyper_threading_cpu: - /* delay 10 ms */ - movl $10000, %ecx -1: inb $0x80, %al - dec %ecx - jnz 1b - post_code(0x25) /* Send Start IPI to all excluding ourself. */ @@ -198,12 +192,6 @@ hyper_threading_cpu: andl $LAPIC_ICR_BUSY, %ecx jnz 1b - /* delay 250 us */ - movl $250, %ecx -1: inb $0x80, %al - dec %ecx - jnz 1b - post_code(0x26) /* Wait for sibling CPU to start. */ -- cgit v1.2.3