From 9bb5c5c402fa26b9726019abc70c580d874bdfef Mon Sep 17 00:00:00 2001 From: Vladimir Serbinenko Date: Sun, 9 Nov 2014 03:51:32 +0100 Subject: acpigen: Remove all explicit length tracking Change-Id: I88248d78c01b4b4e42a097889b5f4ddfdac3d966 Signed-off-by: Vladimir Serbinenko Reviewed-on: http://review.coreboot.org/7367 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek --- src/cpu/intel/model_2065x/acpi.c | 16 ++++++---------- src/cpu/intel/model_206ax/acpi.c | 16 ++++++---------- 2 files changed, 12 insertions(+), 20 deletions(-) (limited to 'src/cpu') diff --git a/src/cpu/intel/model_2065x/acpi.c b/src/cpu/intel/model_2065x/acpi.c index 15358239e0..1e4bb036d3 100644 --- a/src/cpu/intel/model_2065x/acpi.c +++ b/src/cpu/intel/model_2065x/acpi.c @@ -152,31 +152,27 @@ static acpi_tstate_t tss_table_coarse[] = { { 13, 125, 0, 0x19, 0 }, }; -static int generate_T_state_entries(int core, int cores_per_package) +static void generate_T_state_entries(int core, int cores_per_package) { - int len; - /* Indicate SW_ALL coordination for T-states */ - len = acpigen_write_TSD_package(core, cores_per_package, SW_ALL); + acpigen_write_TSD_package(core, cores_per_package, SW_ALL); /* Indicate FFixedHW so OS will use MSR */ - len += acpigen_write_empty_PTC(); + acpigen_write_empty_PTC(); /* Set a T-state limit that can be modified in NVS */ - len += acpigen_write_TPC("\\TLVL"); + acpigen_write_TPC("\\TLVL"); /* * CPUID.(EAX=6):EAX[5] indicates support * for extended throttle levels. */ if (cpuid_eax(6) & (1 << 5)) - len += acpigen_write_TSS_package( + acpigen_write_TSS_package( ARRAY_SIZE(tss_table_fine), tss_table_fine); else - len += acpigen_write_TSS_package( + acpigen_write_TSS_package( ARRAY_SIZE(tss_table_coarse), tss_table_coarse); - - return len; } static int calculate_power(int tdp, int p1_ratio, int ratio) diff --git a/src/cpu/intel/model_206ax/acpi.c b/src/cpu/intel/model_206ax/acpi.c index 30b19e93f1..47c958a188 100644 --- a/src/cpu/intel/model_206ax/acpi.c +++ b/src/cpu/intel/model_206ax/acpi.c @@ -152,31 +152,27 @@ static acpi_tstate_t tss_table_coarse[] = { { 13, 125, 0, 0x19, 0 }, }; -static int generate_T_state_entries(int core, int cores_per_package) +static void generate_T_state_entries(int core, int cores_per_package) { - int len; - /* Indicate SW_ALL coordination for T-states */ - len = acpigen_write_TSD_package(core, cores_per_package, SW_ALL); + acpigen_write_TSD_package(core, cores_per_package, SW_ALL); /* Indicate FFixedHW so OS will use MSR */ - len += acpigen_write_empty_PTC(); + acpigen_write_empty_PTC(); /* Set a T-state limit that can be modified in NVS */ - len += acpigen_write_TPC("\\TLVL"); + acpigen_write_TPC("\\TLVL"); /* * CPUID.(EAX=6):EAX[5] indicates support * for extended throttle levels. */ if (cpuid_eax(6) & (1 << 5)) - len += acpigen_write_TSS_package( + acpigen_write_TSS_package( ARRAY_SIZE(tss_table_fine), tss_table_fine); else - len += acpigen_write_TSS_package( + acpigen_write_TSS_package( ARRAY_SIZE(tss_table_coarse), tss_table_coarse); - - return len; } static int calculate_power(int tdp, int p1_ratio, int ratio) -- cgit v1.2.3