From 99acb49cf71ee7038216391ae2b0d09675ab6ce5 Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Tue, 17 Jun 2003 16:51:06 +0000 Subject: added config and other test files. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/k7/Config.lb | 3 +++ src/cpu/k8/Config.lb | 3 +++ src/cpu/p5/Config.lb | 5 +++++ src/cpu/p6/Config.lb | 5 +++++ 4 files changed, 16 insertions(+) create mode 100644 src/cpu/k7/Config.lb create mode 100644 src/cpu/k8/Config.lb create mode 100644 src/cpu/p5/Config.lb create mode 100644 src/cpu/p6/Config.lb (limited to 'src/cpu') diff --git a/src/cpu/k7/Config.lb b/src/cpu/k7/Config.lb new file mode 100644 index 0000000000..e27b42efb3 --- /dev/null +++ b/src/cpu/k7/Config.lb @@ -0,0 +1,3 @@ +option k7=1 +default CPU_FIXUP=1 +#object cpufixup.o diff --git a/src/cpu/k8/Config.lb b/src/cpu/k8/Config.lb new file mode 100644 index 0000000000..28cd7a2877 --- /dev/null +++ b/src/cpu/k8/Config.lb @@ -0,0 +1,3 @@ +default k8=1 +default CPU_FIXUP=1 +object cpufixup.o diff --git a/src/cpu/p5/Config.lb b/src/cpu/p5/Config.lb new file mode 100644 index 0000000000..9d1d7f2a64 --- /dev/null +++ b/src/cpu/p5/Config.lb @@ -0,0 +1,5 @@ +default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=0 +option i586=1 +object cpuid.o +if CONFIG_UDELAY_TSC object delay_tsc.o end +#object tsc.o diff --git a/src/cpu/p6/Config.lb b/src/cpu/p6/Config.lb new file mode 100644 index 0000000000..aa92fa46d8 --- /dev/null +++ b/src/cpu/p6/Config.lb @@ -0,0 +1,5 @@ +option i686=1 +option INTEL_PPRO_MTRR=1 +#object microcode.o +object mtrr.o +#object l2_cache.o -- cgit v1.2.3