From 891f71a541fc036bd7de892d2eabd7df23bcecbb Mon Sep 17 00:00:00 2001 From: Dave Frodin Date: Mon, 19 Jan 2015 15:58:24 -0700 Subject: amd/00730F01: Move SteppeEagle specific settings to northbridge These settings are specific to the SteppeEagle SOC and should be made in its northbridge code rather than the CPU code. Change-Id: I1a231f95225e1414b0cbc026a2a7b7797bd91fca Signed-off-by: Dave Frodin Reviewed-on: http://review.coreboot.org/8254 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones --- src/cpu/amd/pi/amd_late_init.c | 14 -------------- 1 file changed, 14 deletions(-) (limited to 'src/cpu') diff --git a/src/cpu/amd/pi/amd_late_init.c b/src/cpu/amd/pi/amd_late_init.c index 46116ca4bd..4b08d1bf4f 100644 --- a/src/cpu/amd/pi/amd_late_init.c +++ b/src/cpu/amd/pi/amd_late_init.c @@ -34,20 +34,6 @@ static void agesawrapper_post_device(void *unused) AGESAWRAPPER(amdinitlate); -#if (1) /* NORTHBRIDGE_00730F01 */ - device_t dev; - u32 value; - dev = dev_find_slot(0, PCI_DEVFN(0, 0)); /* clear IoapicSbFeatureEn */ - pci_write_config32(dev, 0xF8, 0); - pci_write_config32(dev, 0xFC, 5); /* TODO: move it to dsdt.asl */ - - /* disable No Snoop */ - dev = dev_find_slot(0, PCI_DEVFN(1, 1)); - value = pci_read_config32(dev, 0x60); - value &= ~(1 << 11); - pci_write_config32(dev, 0x60, value); -#endif - if (!acpi_s3_resume_allowed()) return; -- cgit v1.2.3