From 57879c9bd1775ad7089e3ab93dd260deec87e95c Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Tue, 31 Jul 2012 16:47:25 -0700 Subject: Make the device tree available in the rom stage We thought about two ways to do this change. The way we decided to try was to 1. drop all ops from devices in romstage 2. constify all devices in romstage (make them read-only) so we can compile static.c into romstage 3. the device tree "devices" can be used to read configuration from the device tree (and nothing else, really) 4. the device tree devices are accessed through struct device * in romstage only. device_t stays the typedef to int in romstage 5. Use the same static.c file in ramstage and romstage We declare structs as follows: ROMSTAGE_CONST struct bus dev_root_links[]; ROMSTAGE_CONST is const in romstage and empty in ramstage; This forces all of the device tree into the text area. So a struct looks like this: static ROMSTAGE_CONST struct device _dev21 = { #ifndef __PRE_RAM__ .ops = 0, #endif .bus = &_dev7_links[0], .path = {.type=DEVICE_PATH_PCI,{.pci={ .devfn = PCI_DEVFN(0x1c,3)}}}, .enabled = 0, .on_mainboard = 1, .subsystem_vendor = 0x1ae0, .subsystem_device = 0xc000, .link_list = NULL, .sibling = &_dev22, #ifndef __PRE_RAM__ .chip_ops = &southbridge_intel_bd82x6x_ops, #endif .chip_info = &southbridge_intel_bd82x6x_info_10, .next=&_dev22 }; Change-Id: I722454d8d3c40baf7df989f5a6891f6ba7db5727 Signed-off-by: Ronald G. Minnich Signed-off-by: Stefan Reinauer Reviewed-on: http://review.coreboot.org/1398 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/cpu/amd/agesa/s3_resume.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/cpu') diff --git a/src/cpu/amd/agesa/s3_resume.c b/src/cpu/amd/agesa/s3_resume.c index 6bb053d7a1..0348a9f746 100644 --- a/src/cpu/amd/agesa/s3_resume.c +++ b/src/cpu/amd/agesa/s3_resume.c @@ -29,7 +29,9 @@ #endif #include #include +#ifndef __PRE_RAM__ #include +#endif #include #include #include -- cgit v1.2.3