From 26afd18e1084c026c655aea7f7066a32c5d9ef90 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Fri, 2 Apr 2010 22:31:35 +0000 Subject: remove more warnings. Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5350 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/amd/model_gx2/cpubug.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'src/cpu') diff --git a/src/cpu/amd/model_gx2/cpubug.c b/src/cpu/amd/model_gx2/cpubug.c index 20284e04c2..82570f5b0a 100644 --- a/src/cpu/amd/model_gx2/cpubug.c +++ b/src/cpu/amd/model_gx2/cpubug.c @@ -92,7 +92,7 @@ pcideadlock(void) * ****************************************************************************/ -void bug784(void) +static void bug784(void) { msr_t msr; //static char *name = "Geode by NSC"; @@ -133,7 +133,7 @@ void bug784(void) * Modified: * **************************************************************************/ -void eng1398(void) +static void eng1398(void) { msr_t msr; @@ -164,7 +164,7 @@ void eng1398(void) * Modified: * **************************************************************************/ -void +static void eng2900(void) { msr_t msr; @@ -248,7 +248,7 @@ eng2900(void) } } -void bug118253(void) +static void bug118253(void) { /* GLPCI PIO Post Control shouldn't be enabled */ msr_t msr; @@ -258,7 +258,7 @@ void bug118253(void) wrmsr(GLPCI_SPARE, msr); } -void bug118339(void) +static void bug118339(void) { /* per AMD, do this always */ msr_t msr = {0,0}; @@ -337,7 +337,7 @@ void bug118339(void) /** Modified:*/ /***/ /****************************************************************************/ -void disablememoryreadorder(void) +static void disablememoryreadorder(void) { msr_t msr; msr = rdmsr(MC_CF8F_DATA); -- cgit v1.2.3