From e6cd6caf31d1e22b56a94c941f50b47e77bb41cd Mon Sep 17 00:00:00 2001 From: Raul E Rangel Date: Fri, 25 Feb 2022 12:40:32 -0700 Subject: cpu/x86/smm: Add weak SoC init and exit methods This change provides hooks for the SoC so it can perform any initialization and cleanup in the SMM handler. For example, if we have a UART enabled firmware with DEBUG_SMI, the UART controller could have been powered off by the OS. In this case we need to power on the UART when entering SMM, and then power it off before we exit. If the OS had the UART enabled when entering SMM, we should snapshot the UART register state, and restore it on exit. Otherwise we risk clearing some interrupt enable bits. BUG=b:221231786, b:217968734 TEST=Build test guybrush Signed-off-by: Raul E Rangel Change-Id: I946619cd62a974a98c575a92943b43ea639fc329 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62500 Tested-by: build bot (Jenkins) Reviewed-by: Karthik Ramasubramanian --- src/cpu/x86/smm/smm_module_handler.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/cpu/x86') diff --git a/src/cpu/x86/smm/smm_module_handler.c b/src/cpu/x86/smm/smm_module_handler.c index bd4149a797..e18a26a250 100644 --- a/src/cpu/x86/smm/smm_module_handler.c +++ b/src/cpu/x86/smm/smm_module_handler.c @@ -157,6 +157,8 @@ asmlinkage void smm_handler_start(void *arg) smi_backup_pci_address(); + smm_soc_early_init(); + console_init(); printk(BIOS_SPEW, "\nSMI# #%d\n", cpu); @@ -186,6 +188,8 @@ asmlinkage void smm_handler_start(void *arg) die("SMM Handler caused a stack overflow\n"); } + smm_soc_exit(); + smi_release_lock(); /* De-assert SMI# signal to allow another SMI */ @@ -206,3 +210,6 @@ void __weak mainboard_smi_gpi(u32 gpi_sts) {} int __weak mainboard_smi_apmc(u8 data) { return 0; } void __weak mainboard_smi_sleep(u8 slp_typ) {} void __weak mainboard_smi_finalize(void) {} + +void __weak smm_soc_early_init(void) {} +void __weak smm_soc_exit(void) {} -- cgit v1.2.3