From c02b4fc9db3c3c1e263027382697b566127f66bb Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Mon, 22 Mar 2010 11:42:32 +0000 Subject: printk_foo -> printk(BIOS_FOO, ...) Signed-off-by: Stefan Reinauer Acked-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/x86/cache/cache.c | 2 +- src/cpu/x86/lapic/lapic.c | 8 ++--- src/cpu/x86/lapic/lapic_cpu_init.c | 68 +++++++++++++++++++------------------- src/cpu/x86/mtrr/mtrr.c | 48 +++++++++++++-------------- src/cpu/x86/pae/pgtbl.c | 2 +- src/cpu/x86/smm/smihandler.c | 10 +++--- src/cpu/x86/tsc/delay_tsc.c | 12 +++---- 7 files changed, 75 insertions(+), 75 deletions(-) (limited to 'src/cpu/x86') diff --git a/src/cpu/x86/cache/cache.c b/src/cpu/x86/cache/cache.c index 92e4a69e29..a7cba4ac5c 100644 --- a/src/cpu/x86/cache/cache.c +++ b/src/cpu/x86/cache/cache.c @@ -4,7 +4,7 @@ void x86_enable_cache(void) { post_code(0x60); - printk_info("Enabling cache\n"); + printk(BIOS_INFO, "Enabling cache\n"); enable_cache(); } diff --git a/src/cpu/x86/lapic/lapic.c b/src/cpu/x86/lapic/lapic.c index fc736c96d2..555d74eecc 100644 --- a/src/cpu/x86/lapic/lapic.c +++ b/src/cpu/x86/lapic/lapic.c @@ -17,7 +17,7 @@ void setup_lapic(void) /* Only Pentium Pro and later have those MSR stuff */ msr_t msr; - printk_info("Setting up local apic..."); + printk(BIOS_INFO, "Setting up local apic..."); /* Enable the local apic */ msr = rdmsr(LAPIC_BASE_MSR); @@ -55,18 +55,18 @@ void setup_lapic(void) LAPIC_DELIVERY_MODE_NMI) ); - printk_debug(" apic_id: 0x%02lx ", lapicid()); + printk(BIOS_DEBUG, " apic_id: 0x%02lx ", lapicid()); #else /* !NEED_LLAPIC */ /* Only Pentium Pro and later have those MSR stuff */ msr_t msr; - printk_info("Disabling local apic..."); + printk(BIOS_INFO, "Disabling local apic..."); msr = rdmsr(LAPIC_BASE_MSR); msr.lo &= ~LAPIC_BASE_MSR_ENABLE; wrmsr(LAPIC_BASE_MSR, msr); #endif /* !NEED_LAPIC */ - printk_info("done.\n"); + printk(BIOS_INFO, "done.\n"); post_code(0x9b); } diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c index 3033902525..87452653ca 100644 --- a/src/cpu/x86/lapic/lapic_cpu_init.c +++ b/src/cpu/x86/lapic/lapic_cpu_init.c @@ -66,7 +66,7 @@ static void copy_secondary_start_to_1m_below(void) /* copy the _secondary_start to the ram below 1M*/ memcpy((unsigned char *)start_eip, (unsigned char *)_secondary_start, code_size); - printk_debug("start_eip=0x%08lx, offset=0x%08lx, code_size=0x%08lx\n", start_eip, ((unsigned long)_secondary_start - start_eip), code_size); + printk(BIOS_DEBUG, "start_eip=0x%08lx, offset=0x%08lx, code_size=0x%08lx\n", start_eip, ((unsigned long)_secondary_start - start_eip), code_size); #endif } @@ -80,7 +80,7 @@ static int lapic_start_cpu(unsigned long apicid) * Starting actual IPI sequence... */ - printk_spew("Asserting INIT.\n"); + printk(BIOS_SPEW, "Asserting INIT.\n"); /* * Turn INIT on target chip @@ -94,28 +94,28 @@ static int lapic_start_cpu(unsigned long apicid) lapic_write_around(LAPIC_ICR, LAPIC_INT_LEVELTRIG | LAPIC_INT_ASSERT | LAPIC_DM_INIT); - printk_spew("Waiting for send to finish...\n"); + printk(BIOS_SPEW, "Waiting for send to finish...\n"); timeout = 0; do { - printk_spew("+"); + printk(BIOS_SPEW, "+"); udelay(100); send_status = lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY; } while (send_status && (timeout++ < 1000)); if (timeout >= 1000) { - printk_err("CPU %ld: First apic write timed out. Disabling\n", + printk(BIOS_ERR, "CPU %ld: First apic write timed out. Disabling\n", apicid); // too bad. - printk_err("ESR is 0x%lx\n", lapic_read(LAPIC_ESR)); + printk(BIOS_ERR, "ESR is 0x%lx\n", lapic_read(LAPIC_ESR)); if (lapic_read(LAPIC_ESR)) { - printk_err("Try to reset ESR\n"); + printk(BIOS_ERR, "Try to reset ESR\n"); lapic_write_around(LAPIC_ESR, 0); - printk_err("ESR is 0x%lx\n", lapic_read(LAPIC_ESR)); + printk(BIOS_ERR, "ESR is 0x%lx\n", lapic_read(LAPIC_ESR)); } return 0; } mdelay(10); - printk_spew("Deasserting INIT.\n"); + printk(BIOS_SPEW, "Deasserting INIT.\n"); /* Target chip */ lapic_write_around(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(apicid)); @@ -123,15 +123,15 @@ static int lapic_start_cpu(unsigned long apicid) /* Send IPI */ lapic_write_around(LAPIC_ICR, LAPIC_INT_LEVELTRIG | LAPIC_DM_INIT); - printk_spew("Waiting for send to finish...\n"); + printk(BIOS_SPEW, "Waiting for send to finish...\n"); timeout = 0; do { - printk_spew("+"); + printk(BIOS_SPEW, "+"); udelay(100); send_status = lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY; } while (send_status && (timeout++ < 1000)); if (timeout >= 1000) { - printk_err("CPU %ld: Second apic write timed out. Disabling\n", + printk(BIOS_ERR, "CPU %ld: Second apic write timed out. Disabling\n", apicid); // too bad. return 0; @@ -148,16 +148,16 @@ static int lapic_start_cpu(unsigned long apicid) /* * Run STARTUP IPI loop. */ - printk_spew("#startup loops: %d.\n", num_starts); + printk(BIOS_SPEW, "#startup loops: %d.\n", num_starts); maxlvt = 4; for (j = 1; j <= num_starts; j++) { - printk_spew("Sending STARTUP #%d to %lu.\n", j, apicid); + printk(BIOS_SPEW, "Sending STARTUP #%d to %lu.\n", j, apicid); lapic_read_around(LAPIC_SPIV); lapic_write(LAPIC_ESR, 0); lapic_read(LAPIC_ESR); - printk_spew("After apic_write.\n"); + printk(BIOS_SPEW, "After apic_write.\n"); /* * STARTUP IPI @@ -176,12 +176,12 @@ static int lapic_start_cpu(unsigned long apicid) */ udelay(300); - printk_spew("Startup point 1.\n"); + printk(BIOS_SPEW, "Startup point 1.\n"); - printk_spew("Waiting for send to finish...\n"); + printk(BIOS_SPEW, "Waiting for send to finish...\n"); timeout = 0; do { - printk_spew("+"); + printk(BIOS_SPEW, "+"); udelay(100); send_status = lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY; } while (send_status && (timeout++ < 1000)); @@ -201,11 +201,11 @@ static int lapic_start_cpu(unsigned long apicid) if (send_status || accept_status) break; } - printk_spew("After Startup.\n"); + printk(BIOS_SPEW, "After Startup.\n"); if (send_status) - printk_warning("APIC never delivered???\n"); + printk(BIOS_WARNING, "APIC never delivered???\n"); if (accept_status) - printk_warning("APIC delivery error (%lx).\n", accept_status); + printk(BIOS_WARNING, "APIC delivery error (%lx).\n", accept_status); if (send_status || accept_status) return 0; return 1; @@ -294,7 +294,7 @@ void stop_this_cpu(void) id = lapic_read(LAPIC_ID) >> 24; - printk_debug("CPU %ld going down...\n", id); + printk(BIOS_DEBUG, "CPU %ld going down...\n", id); /* send an LAPIC INIT to myself */ lapic_write_around(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(id)); @@ -302,37 +302,37 @@ void stop_this_cpu(void) /* wait for the ipi send to finish */ #if 0 - // When these two printk_spew calls are not removed, the + // When these two printk(BIOS_SPEW, ...) calls are not removed, the // machine will hang when log level is SPEW. Why? - printk_spew("Waiting for send to finish...\n"); + printk(BIOS_SPEW, "Waiting for send to finish...\n"); #endif timeout = 0; do { #if 0 - printk_spew("+"); + printk(BIOS_SPEW, "+"); #endif udelay(100); send_status = lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY; } while (send_status && (timeout++ < 1000)); if (timeout >= 1000) { - printk_err("timed out\n"); + printk(BIOS_ERR, "timed out\n"); } mdelay(10); - printk_spew("Deasserting INIT.\n"); + printk(BIOS_SPEW, "Deasserting INIT.\n"); /* Deassert the LAPIC INIT */ lapic_write_around(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(id)); lapic_write_around(LAPIC_ICR, LAPIC_INT_LEVELTRIG | LAPIC_DM_INIT); - printk_spew("Waiting for send to finish...\n"); + printk(BIOS_SPEW, "Waiting for send to finish...\n"); timeout = 0; do { - printk_spew("+"); + printk(BIOS_SPEW, "+"); udelay(100); send_status = lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY; } while (send_status && (timeout++ < 1000)); if (timeout >= 1000) { - printk_err("timed out\n"); + printk(BIOS_ERR, "timed out\n"); } while(1) { @@ -387,7 +387,7 @@ static void start_other_cpus(struct bus *cpu_bus, device_t bsp_cpu) if (!start_cpu(cpu)) { /* Record the error in cpu? */ - printk_err("CPU 0x%02x would not start!\n", + printk(BIOS_ERR, "CPU 0x%02x would not start!\n", cpu->path.apic.apic_id); } #if CONFIG_SERIAL_CPU_INIT == 1 @@ -408,7 +408,7 @@ static void wait_other_cpus_stop(struct bus *cpu_bus) active_count = atomic_read(&active_cpus); while(active_count > 1) { if (active_count != old_active_count) { - printk_info("Waiting for %d CPUS to stop\n", active_count - 1); + printk(BIOS_INFO, "Waiting for %d CPUS to stop\n", active_count - 1); old_active_count = active_count; } udelay(10); @@ -419,11 +419,11 @@ static void wait_other_cpus_stop(struct bus *cpu_bus) continue; } if (!cpu->initialized) { - printk_err("CPU 0x%02x did not initialize!\n", + printk(BIOS_ERR, "CPU 0x%02x did not initialize!\n", cpu->path.apic.apic_id); } } - printk_debug("All AP CPUs stopped\n"); + printk(BIOS_DEBUG, "All AP CPUs stopped\n"); } #else /* CONFIG_SMP */ diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index dab5a0f422..94d7ca7d35 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -98,7 +98,7 @@ static void set_var_mtrr( base.hi = basek >> 22; base.lo = basek << 10; - printk_spew("ADDRESS_MASK_HIGH=%#x\n", address_mask_high); + printk(BIOS_SPEW, "ADDRESS_MASK_HIGH=%#x\n", address_mask_high); if (sizek < 4*1024*1024) { mask.hi = address_mask_high; @@ -236,12 +236,12 @@ static unsigned int range_to_mtrr(unsigned int reg, /* If there's no MTRR hole, this function will bail out * here when called for the hole. */ - printk_spew("Zero-sized MTRR range @%ldKB\n", range_startk); + printk(BIOS_SPEW, "Zero-sized MTRR range @%ldKB\n", range_startk); return reg; } if (reg >= BIOS_MTRRS) { - printk_err("Warning: Out of MTRRs for base: %4ldMB, range: %ldMB, type %s\n", + printk(BIOS_ERR, "Warning: Out of MTRRs for base: %4ldMB, range: %ldMB, type %s\n", range_startk >>10, range_sizek >> 10, (type==MTRR_TYPE_UNCACHEABLE)?"UC": ((type==MTRR_TYPE_WRBACK)?"WB":"Other") ); @@ -258,7 +258,7 @@ static unsigned int range_to_mtrr(unsigned int reg, align = max_align; } sizek = 1 << align; - printk_debug("Setting variable MTRR %d, base: %4ldMB, range: %4ldMB, type %s\n", + printk(BIOS_DEBUG, "Setting variable MTRR %d, base: %4ldMB, range: %4ldMB, type %s\n", reg, range_startk >>10, sizek >> 10, (type==MTRR_TYPE_UNCACHEABLE)?"UC": ((type==MTRR_TYPE_WRBACK)?"WB":"Other") @@ -267,7 +267,7 @@ static unsigned int range_to_mtrr(unsigned int reg, range_startk += sizek; range_sizek -= sizek; if (reg >= BIOS_MTRRS) { - printk_err("Running out of variable MTRRs!\n"); + printk(BIOS_ERR, "Running out of variable MTRRs!\n"); break; } } @@ -295,7 +295,7 @@ static void set_fixed_mtrr_resource(void *gp, struct device *dev, struct resourc if (start_mtrr >= NUM_FIXED_RANGES) { return; } - printk_debug("Setting fixed MTRRs(%d-%d) Type: WB\n", + printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) Type: WB\n", start_mtrr, last_mtrr); set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK); @@ -357,7 +357,7 @@ void set_var_mtrr_resource(void *gp, struct device *dev, struct resource *res) #endif } /* Allocate an msr */ - printk_spew(" Allocate an msr - basek = %08lx, sizek = %08lx,\n", basek, sizek); + printk(BIOS_SPEW, " Allocate an msr - basek = %08lx, sizek = %08lx,\n", basek, sizek); state->range_startk = basek; state->range_sizek = sizek; } @@ -369,9 +369,9 @@ void x86_setup_fixed_mtrrs(void) * and clear out the mtrrs. */ - printk_debug("\n"); + printk(BIOS_DEBUG, "\n"); /* Initialized the fixed_mtrrs to uncached */ - printk_debug("Setting fixed MTRRs(%d-%d) Type: UC\n", + printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) Type: UC\n", 0, NUM_FIXED_RANGES); set_fixed_mtrrs(0, NUM_FIXED_RANGES, MTRR_TYPE_UNCACHEABLE); @@ -380,10 +380,10 @@ void x86_setup_fixed_mtrrs(void) search_global_resources( IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE, set_fixed_mtrr_resource, NULL); - printk_debug("DONE fixed MTRRs\n"); + printk(BIOS_DEBUG, "DONE fixed MTRRs\n"); /* enable fixed MTRR */ - printk_spew("call enable_fixed_mtrr()\n"); + printk(BIOS_SPEW, "call enable_fixed_mtrr()\n"); enable_fixed_mtrr(); } @@ -421,7 +421,7 @@ void x86_setup_var_mtrrs(unsigned address_bits) #if (CONFIG_GFXUMA == 1) /* UMA or SP. */ // For now we assume the UMA space is at the end of memory if (var_state.hole_startk || var_state.hole_sizek) { - printk_debug("Warning: Can't set up MTRR hole for UMA due to pre-existing MTRR hole.\n"); + printk(BIOS_DEBUG, "Warning: Can't set up MTRR hole for UMA due to pre-existing MTRR hole.\n"); } else { // Increase the base range and set up UMA as an UC hole instead var_state.range_sizek += (uma_memory_size >> 10); @@ -437,15 +437,15 @@ void x86_setup_var_mtrrs(unsigned address_bits) var_state.reg = range_to_mtrr(var_state.reg, var_state.hole_startk, var_state.hole_sizek, 0, MTRR_TYPE_UNCACHEABLE, var_state.address_bits); #endif - printk_debug("DONE variable MTRRs\n"); - printk_debug("Clear out the extra MTRR's\n"); + printk(BIOS_DEBUG, "DONE variable MTRRs\n"); + printk(BIOS_DEBUG, "Clear out the extra MTRR's\n"); /* Clear out the extra MTRR's */ while(var_state.reg < MTRRS) { set_var_mtrr(var_state.reg++, 0, 0, 0, var_state.address_bits); } - printk_spew("call enable_var_mtrr()\n"); + printk(BIOS_SPEW, "call enable_var_mtrr()\n"); enable_var_mtrr(); - printk_spew("Leave %s\n", __func__); + printk(BIOS_SPEW, "Leave %s\n", __func__); post_code(0x6A); } @@ -460,24 +460,24 @@ int x86_mtrr_check(void) { /* Only Pentium Pro and later have MTRR */ msr_t msr; - printk_debug("\nMTRR check\n"); + printk(BIOS_DEBUG, "\nMTRR check\n"); msr = rdmsr(0x2ff); msr.lo >>= 10; - printk_debug("Fixed MTRRs : "); + printk(BIOS_DEBUG, "Fixed MTRRs : "); if (msr.lo & 0x01) - printk_debug("Enabled\n"); + printk(BIOS_DEBUG, "Enabled\n"); else - printk_debug("Disabled\n"); + printk(BIOS_DEBUG, "Disabled\n"); - printk_debug("Variable MTRRs: "); + printk(BIOS_DEBUG, "Variable MTRRs: "); if (msr.lo & 0x02) - printk_debug("Enabled\n"); + printk(BIOS_DEBUG, "Enabled\n"); else - printk_debug("Disabled\n"); + printk(BIOS_DEBUG, "Disabled\n"); - printk_debug("\n"); + printk(BIOS_DEBUG, "\n"); post_code(0x93); return ((int) msr.lo); diff --git a/src/cpu/x86/pae/pgtbl.c b/src/cpu/x86/pae/pgtbl.c index 8919f0e049..4440d7bd8c 100644 --- a/src/cpu/x86/pae/pgtbl.c +++ b/src/cpu/x86/pae/pgtbl.c @@ -66,7 +66,7 @@ void *map_2M_page(unsigned long page) #warning "We may need to increase CONFIG_RAMTOP, it need to be more than (0x100000+20480*CONFIG_MAX_CPUS)\n" #endif if(x_end > (CONFIG_RAMTOP)) { - printk_debug("map_2M_page: Please increase the CONFIG_RAMTOP more than %dK\n", x_end); + printk(BIOS_DEBUG, "map_2M_page: Please increase the CONFIG_RAMTOP more than %dK\n", x_end); die("Can not go on"); } #else diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c index 7254d55eab..3dddf6c8ae 100644 --- a/src/cpu/x86/smm/smihandler.c +++ b/src/cpu/x86/smm/smihandler.c @@ -68,7 +68,7 @@ void io_trap_handler(int smif) /* If a handler function handled a given IO trap, it * shall return a non-zero value */ - printk_debug("SMI function trap 0x%x: ", smif); + printk(BIOS_DEBUG, "SMI function trap 0x%x: ", smif); if (southbridge_io_trap_handler(smif)) return; @@ -76,7 +76,7 @@ void io_trap_handler(int smif) if (mainboard_io_trap_handler(smif)) return; - printk_debug("Unknown function\n"); + printk(BIOS_DEBUG, "Unknown function\n"); } /** @@ -111,7 +111,7 @@ void smi_handler(u32 smm_revision) console_init(); - printk_spew("\nSMI# #%d\n", node); + printk(BIOS_SPEW, "\nSMI# #%d\n", node); switch (smm_revision) { case 0x00030002: @@ -131,8 +131,8 @@ void smi_handler(u32 smm_revision) (0xa8000 + 0x7e00 - (node * 0x400)); break; default: - printk_debug("smm_revision: 0x%08x\n", smm_revision); - printk_debug("SMI# not supported on your CPU\n"); + printk(BIOS_DEBUG, "smm_revision: 0x%08x\n", smm_revision); + printk(BIOS_DEBUG, "SMI# not supported on your CPU\n"); /* Don't release lock, so no further SMI will happen, * if we don't handle it anyways. */ diff --git a/src/cpu/x86/tsc/delay_tsc.c b/src/cpu/x86/tsc/delay_tsc.c index 72b1f7196c..4a8fd5287e 100644 --- a/src/cpu/x86/tsc/delay_tsc.c +++ b/src/cpu/x86/tsc/delay_tsc.c @@ -78,7 +78,7 @@ static unsigned long long calibrate_tsc(void) * 32 bits.. */ bad_ctc: - printk_err("bad_ctc\n"); + printk(BIOS_ERR, "bad_ctc\n"); return 0; } @@ -104,7 +104,7 @@ static unsigned long long calibrate_tsc(void) unsigned long long start, end, delta; unsigned long result, count; - printk_spew("Calibrating delay loop...\n"); + printk(BIOS_SPEW, "Calibrating delay loop...\n"); start = rdtscll(); // no udivdi3 because we don't like libgcc. (only in x86emu) // so we count to 1<< 20 and then right shift 20 @@ -128,10 +128,10 @@ static unsigned long long calibrate_tsc(void) delta >>= 20; // save this for microsecond timing. result = delta; - printk_spew("end %llx, start %llx\n", end, start); - printk_spew("32-bit delta %ld\n", (unsigned long) delta); + printk(BIOS_SPEW, "end %llx, start %llx\n", end, start); + printk(BIOS_SPEW, "32-bit delta %ld\n", (unsigned long) delta); - printk_spew("%s 32-bit result is %ld\n", + printk(BIOS_SPEW, "%s 32-bit result is %ld\n", __func__, result); return delta; @@ -144,7 +144,7 @@ void init_timer(void) { if (!clocks_per_usec) { clocks_per_usec = calibrate_tsc(); - printk_info("clocks_per_usec: %lu\n", clocks_per_usec); + printk(BIOS_INFO, "clocks_per_usec: %lu\n", clocks_per_usec); } } -- cgit v1.2.3