From d82be923b10ef18c64c9565e03959736589ef089 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Thu, 28 Jul 2016 18:58:27 +0200 Subject: src/cpu: Capitalize CPU Change-Id: I58d5c16de796a91fa14d8db78722024266c09a94 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/15934 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Martin Roth --- src/cpu/x86/smm/smm_module_loader.c | 8 ++++---- src/cpu/x86/smm/smm_stub.S | 8 ++++---- src/cpu/x86/smm/smmrelocate.S | 4 ++-- 3 files changed, 10 insertions(+), 10 deletions(-) (limited to 'src/cpu/x86/smm') diff --git a/src/cpu/x86/smm/smm_module_loader.c b/src/cpu/x86/smm/smm_module_loader.c index 853923d99c..09ddb037f8 100644 --- a/src/cpu/x86/smm/smm_module_loader.c +++ b/src/cpu/x86/smm/smm_module_loader.c @@ -48,7 +48,7 @@ extern unsigned char _binary_smmstub_start[]; /* This is the SMM handler that the stub calls. It is encoded as an rmodule. */ extern unsigned char _binary_smm_start[]; -/* Per cpu minimum stack size. */ +/* Per CPU minimum stack size. */ #define SMM_MINIMUM_STACK_SIZE 32 /* @@ -75,7 +75,7 @@ static void smm_place_jmp_instructions(void *entry_start, int stride, int num, struct smm_entry_ins entry = { .jmp_rel = 0xe9 }; /* Each entry point has an IP value of 0x8000. The SMBASE for each - * cpu is different so the effective address of the entry instruction + * CPU is different so the effective address of the entry instruction * is different. Therefore, the relative displacement for each entry * instruction needs to be updated to reflect the current effective * IP. Additionally, the IP result from the jmp instruction is @@ -126,7 +126,7 @@ static void *smm_stub_place_stacks(char *base, int size, } /* Place the staggered entry points for each CPU. The entry points are - * staggered by the per cpu SMM save state size extending down from + * staggered by the per CPU SMM save state size extending down from * SMM_ENTRY_OFFSET. */ static void smm_stub_place_staggered_entry_points(char *base, const struct smm_loader_params *params, const struct rmodule *smm_stub) @@ -260,7 +260,7 @@ static int smm_module_setup_stub(void *smbase, struct smm_loader_params *params) stub_params->runtime.smbase = (u32)smbase; stub_params->runtime.save_state_size = params->per_cpu_save_state_size; - /* Initialize the APIC id to cpu number table to be 1:1 */ + /* Initialize the APIC id to CPU number table to be 1:1 */ for (i = 0; i < params->num_concurrent_stacks; i++) stub_params->runtime.apic_id_to_cpu[i] = i; diff --git a/src/cpu/x86/smm/smm_stub.S b/src/cpu/x86/smm/smm_stub.S index 564b200c48..d1fe7c1146 100644 --- a/src/cpu/x86/smm/smm_stub.S +++ b/src/cpu/x86/smm/smm_stub.S @@ -40,15 +40,15 @@ smbase: .long 0 save_state_size: .long 0 -/* apic_to_cpu_num is a table mapping the default APIC id to cpu num. If the - * APIC id is found at the given index, the contiguous cpu number is index +/* apic_to_cpu_num is a table mapping the default APIC id to CPU num. If the + * APIC id is found at the given index, the contiguous CPU number is index * into the table. */ apic_to_cpu_num: .fill CONFIG_MAX_CPUS,1,0xff /* end struct smm_runtime */ .data -/* Provide fallback stack to use when a valid cpu number cannot be found. */ +/* Provide fallback stack to use when a valid CPU number cannot be found. */ fallback_stack_bottom: .skip 128 fallback_stack_top: @@ -112,7 +112,7 @@ smm_trampoline32: inc %ecx cmp $CONFIG_MAX_CPUS, %ecx jne 1b - /* This is bad. One cannot find a stack entry because a cpu num could + /* This is bad. One cannot find a stack entry because a CPU num could * not be assigned. Use the fallback stack and check this condition in * C handler. */ movl $(fallback_stack_top), %esp diff --git a/src/cpu/x86/smm/smmrelocate.S b/src/cpu/x86/smm/smmrelocate.S index 128b694d2b..2502df8a56 100644 --- a/src/cpu/x86/smm/smmrelocate.S +++ b/src/cpu/x86/smm/smmrelocate.S @@ -89,7 +89,7 @@ * 0xa0000-0xa0400 and the stub plus stack would need to go * at 0xa8000-0xa8100 (example for core 0). That is not enough. * - * This means we're basically limited to 16 cpu cores before + * This means we're basically limited to 16 CPU cores before * we need to move the SMM handler to TSEG. * * Note: Some versions of Pentium M need their SMBASE aligned to 32k. @@ -167,7 +167,7 @@ smm_relocate: outb %al, %dx movb $'-', %al outb %al, %dx - /* calculate ascii of cpu number. More than 9 cores? -> FIXME */ + /* calculate ascii of CPU number. More than 9 cores? -> FIXME */ movb %cl, %al addb $'0', %al outb %al, %dx -- cgit v1.2.3